# US 8,542,721 B2 · System and method for television signal demodulation and decoding

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- Number: US 8,542,721 B2
- Document ID: US8542721B2
- Status: Granted
- Kind: B2
- Application number: 12/931,862
- Filed: 2011-02-11
- Published: 2011-06-16
- Granted: 2013-09-24
- Earliest claimed: 2008-02-26
- Assignees: Conexant Systems, Inc.
- Applicants: Chi-Ping Nee
- Inventors: Chi-Ping Nee
- Web page: https://patentgrep.com/patent/US8542721B2

## CPC

- H04N 21/4382: {Demodulation or channel decoding, e.g. QPSK demodulation (analog front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002)}
- H04N 21/4113: {PC}
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

A modem for use with a computer having a demodulator and a decoder, the modem comprises a hardware interface; a demodulator front-end having a first input and a first output, the first output of the demodulator front-end being configured to interface with the demodulator of the computer and to provide a demodulated front-end signal to the demodulator over the hardware interface; and a forward error correction (FEC) unit having a second input and a second output, the second input of the FEC unit being configured to interface with the demodulator of the computer and to receive a demodulated signal from the demodulator over the hardware interface, the demodulated signal being a demodulation of the demodulated front-end signal, and the second output of the FEC unit being configured to interface with the decoder of the computer and to provide an FEC signal to the decoder over the hardware interface.

## Claims

### Claim 1

A modem for use with a computer, said modem comprising:
a hardware interface;
a demodulator front-end configured to receive a digital television signal, wherein said demodulator front-end is configured to demodulate said digital television signal to generate a demodulated front-end signal;
a time domain memory configured to store said demodulated front-end signal in time domain;
a fast Fourier transform (FFT) configured to apply FFT to said demodulated front-end signal; and
a frequency domain memory for storing said demodulated front-end signal in frequency domain;
wherein said modem is configured to provide said demodulated front-end signal in time domain and frequency domain signal to said computer over said hardware interface.

### Claim 2 (depends on 1)

The modem of claim 1, wherein said hardware interface is a PCI-e bus interface.

### Claim 3 (depends on 1)

The modem of claim 1 further comprising:
a smart direct memory access controller for deinterleaving data in said demodulated signal; and
a bit-deinterleaving memory for storing said demodulated signal.

### Claim 4 (depends on 1)

The modem of claim 1, wherein said modem is configured to provide said demodulated front-end signal in time domain and frequency domain signal to a demodulator of said computer.

### Claim 5 (depends on 4)

The modern of claim 4, wherein said modem is configured to receive a demodulated signal from said demodulator over said hardware interface, said demodulated signal being a demodulation of said demodulated front-end signal, and wherein said modem is configured to apply a process to said demodulated signal to generate a processed demodulated signal, and transmit said processed demodulated signal to said computer over said hardware interface.

### Claim 6

A modem for use with a computer having a demodulator, said modem comprising:
a hardware interface;
a digital-to-analog converter configured to receive an analog television signal and generate a digital television signal; and
a smart direct memory access controller;
wherein said modem is configured to provide said digital television signal to said computer over said hardware interface;
wherein said modem is further configured to receive a demodulated signal from said demodulator over said hardware interface, said demodulated signal being a demodulation of said digital television signal;
wherein said smart direct memory access controller is configured to deinterleave data in said demodulated signal to generate deinterleaved demodulated data; and
wherein said modem is configured to provide said deinterleaved demodulated signal to said computer over said hardware interface.

### Claim 7 (depends on 6)

The modem of claim 6, wherein said hardware interface is a PCI-e bus interface.

### Claim 8 (depends on 6)

The modem of claim 6 further configured to apply forward error correction to said deinterleaved demodulated data prior to providing said deinterleaved demodulated data to said computer over said hardware interface.

### Claim 9 (depends on 6)

The modem of claim 6 further comprising a bit-deinterleaving memory for storing said demodulated signal.

### Claim 10 (depends on 6)

The modern of claim 6, wherein said deinterleaved demodulated signal is an encoded form for decoding by a decoder of said computer.

### Claim 11

A method for use by a modem for communication with a computer, said method comprising:
receiving a digital television signal;
demodulating said digital television signal, using a demodulator front-end, to generate a demodulated front-end signal;
storing said demodulated front-end signal in time domain using a time domain memory;
applying fast Fourier transform (FFT) to said demodulated front-end signal;
storing said demodulated front-end signal in frequency domain using a frequency domain memory;
transmitting said demodulated front-end signal in time domain and frequency domain to said computer over a hardware interface.

### Claim 12 (depends on 11)

The method of claim 11, wherein said hardware interface is a PCI-e bus interface.

### Claim 13 (depends on 11)

The method of claim 11 further comprising:
deinterleaving data in said demodulated signal using a smart direct memory access controller; and
storing said demodulated signal using a bit-deinterleaving memory.

### Claim 14 (depends on 11)

The method of claim 11, wherein said transmitting transmits said demodulated front-end signal in time domain and frequency domain to a demodulator of said computer over a hardware interface.

### Claim 15 (depends on 14)

The method of claim 14 further comprising:
receiving a demodulated signal from said demodulator over said hardware interface, said demodulated signal being a demodulation of said demodulated front-end signal;
applying a process to said demodulated signal to generate a processed demodulated signal; and
transmitting said processed demodulated signal to said computer over said hardware interface.

### Claim 16

A method for use by a modern for communication with a computer having a demodulator, said method comprising:
converting an analog television signal to a digital television signal;
providing said digital television signal to said computer over a hardware interface;
receiving a demodulated signal from said demodulator over said hardware interface, said demodulated signal being a demodulation of said digital television signal;
deinterleaving data in said demodulated signal to generate a deinterleaved demodulated signal; and
providing said deinterleaved demodulated signal to said computer over said hardware interface.

### Claim 17 (depends on 16)

The method of claim 16, wherein said hardware interface is a PCI-e bus interface.

### Claim 18 (depends on 16)

The method of claim 16 further comprising applying forward error correction to said deinterleaved demodulated data prior to said providing said deinterleaved demodulated data to said computer over said hardware interface.

### Claim 19 (depends on 16)

The method of claim 16 further comprising storing said demodulated signal using a bit-deinterleaving memory.

### Claim 20 (depends on 16)

The method of claim 16, wherein said deinterleaved demodulated signal is an encoded form for decoding by a decoder of said computer.
