# US 8,542,616 B2 · Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,616 B2 - Document ID: US8542616B2 - Status: Granted - Kind: B2 - Application number: 12/250,646 - Filed: 2008-10-14 - Published: 2010-04-15 - Granted: 2013-09-24 - Earliest claimed: 2008-10-14 - Assignees: Texas Instruments Incorporated - Applicants: Robert B. Staszewski; Khurram Muhammad; Dirk Leipold - Inventors: Robert B. Staszewski; Khurram Muhammad; Dirk Leipold - Web page: https://patentgrep.com/patent/US8542616B2 ## CPC - H04B 1/0075: {using different intermediate frequencied for the different bands} - H03D 7/1441: {using field-effect transistors (H03D7/145 takes precedence)} - H03D 7/1466: {Passive mixer arrangements} - H03D 7/1483: {comprising components for selecting a particular frequency component of the output} - H03D 7/165: {at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature (combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002)} - H04L 5/06: the signals being represented by different frequencies (combined with time-division multiplexing H04L5/26) - H04L 5/143: {for modulated signals (H04L5/1469 takes precedence)} - H04L 27/3863: {Compensation for quadrature error in the received signal} - H03D 2200/0025: Gain control circuits - H03D 2200/0047: Offset of DC voltage or frequency - H03D 2200/0074: using a resistive mixer or a passive mixer - H03D 2200/0084: Lowering the supply voltage and saving power - H03D 2200/0088: Reduction of intermodulation, nonlinearities, adjacent channel interference; intercept points of harmonics or intermodulation products - H04L 2027/0016: {Stabilisation of local oscillators} - H04B: TRANSMISSION - H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A novel mechanism for simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing. Multiple RF signals, which may be of various wireless standards, are received using one or more shared processing blocks thereby significantly reducing chip space and power requirements. Shared components include local oscillators, analog to digital converters, digital RX processing and digital baseband processing. In operation, multiple RX front end circuits, one for each desired wireless signal, generate a plurality of IF signals that are frequency multiplexed and combined to create a single combined IF signal. The combined IF signal is processed by a shared processing block. Digital baseband processing is performed on each receive signal to generate respective data outputs. Further, simultaneous full-duplex transmission and reception is performed using a single local oscillator. The phase/frequency modulation of the frequency synthesizer used in the TX is removed from the local oscillator signal for use in the receiver. ## Claims ### Claim 1 A method of multiple signal reception for use in a receiver (RX) having a plurality of RX front end modules, said method comprising the steps of: combining outputs of said plurality of RX front end modules utilizing frequency division multiplexing to generate a combined intermediate frequency (IF) signal therefrom; processing said combined IF signal using at least one RX back end module to generate a plurality of data output signals thereby; and wherein the number of RX back end modules is less than the number of front end modules. ### Claim 2 (depends on 1) The method according to claim 1, wherein each RX front end module utilizes a dedicated local oscillator. ### Claim 3 (depends on 1) The method according to claim 1, wherein one or more said RX front end modules utilizes an edge synthesizer coupled to a single shared local oscillator. ### Claim 4 (depends on 1) The method according to claim 1, wherein one or more said RX front end modules are coupled to a single shared local oscillator, each of said RX front end modules operative to perform an additional frequency translation. ### Claim 5 (depends on 4) The method according to claim 4, wherein said additional frequency translation is performed by a two-dimensional transversal of rotating capacitors. ### Claim 6 (depends on 1) The method according to claim 1, wherein each said RX front end module comprises a dedicated analog to digital converter and wherein the bandwidth of said at least one RX back-end module is at least that of said combined IF signal. ### Claim 7 (depends on 1) The method according to claim 1, wherein said plurality of RX front end modules share a single analog to digital converter whose bandwidth is at least that of said combined IF signal. ### Claim 8 (depends on 1) The method according to claim 1, wherein each RF front end module is operative to receive a signal of a different wireless standard. ### Claim 9 (depends on 1) The method according to claim 1, wherein at least one RX front end module is dedicated to receiving signals for linearization of transmitter components. ### Claim 10 (depends on 1) The method according to claim 1, wherein at least one RX front end module is dedicated to receiving one or more auxiliary signals. ### Claim 11 (depends on 1) The method according to claim 1, wherein said frequency multiplexed signals are separated by a sufficient buffer band to permit subsequent separation using digital filtering. ### Claim 12 (depends on 1) The method according to claim 1, wherein each RX front end module downconverts an input radio frequency (RF) signal to a different intermediate frequency (IF) to generate said frequency division multiplexed combined IF signal. ### Claim 13 (depends on 1) The method according to claim 1, said step of processing comprises the step of frequency demultiplexing said combined IF signal to generate said plurality of data output signals. ### Claim 14 An apparatus for multiple signal reception, comprising: a plurality of receiver (RX) front end circuits, each RX front end circuit operative to generate an intermediate frequency (IF) signal at a particular frequency band; a signal combiner operative to combine said plurality of IF signals using frequency division multiplexing to generate a combined IF signal thereby; at least one RX processing path operative to process said combined IF signal to generate a plurality of data output signals thereby; and wherein the number of RX processing paths is less than the number of front end circuits. ### Claim 15 (depends on 14) The apparatus according to claim 14, wherein each RX front end circuit is operative to receive a different wireless standard signal. ### Claim 16 (depends on 14) The apparatus according to claim 14, wherein each RX front end circuit comprises a dedicated local oscillator. ### Claim 17 (depends on 14) The apparatus according to claim 14, wherein one or more RF front end circuits comprise an edge synthesizer coupled to a single shared local oscillator. ### Claim 18 (depends on 17) The apparatus according to claim 17, wherein said edge synthesizer is operative to generate output clock edges synchronous to its input. ### Claim 19 (depends on 14) The apparatus according to claim 14, wherein each said RX front end circuit comprises a dedicated analog to digital converter and wherein the bandwidth of said RX processing path is at least that of said combined IF signal. ### Claim 20 (depends on 14) The apparatus according to claim 14, wherein said plurality of RX front end circuits share a single analog to digital converter whose bandwidth is at least that of said combined IF signal. ### Claim 21 (depends on 14) The apparatus according to claim 14, wherein said frequency multiplexed signals are separated by a sufficient buffer band to permit subsequent separation using digital filtering. ### Claim 22 A single chip radio apparatus, comprising: at least one transmitter; a plurality of RF front end receive (RX) circuits, each RX circuit operative to receive at least one wireless signal and to generate an intermediate frequency (IF) signal at a particular IF frequency band therefrom; a signal combiner coupled to said plurality of RF front end RX circuits, said signal combiner operative to combine the outputs of said plurality of RF front end RX circuits utilizing frequency division multiplexing to generate an analog combined IF signal therefrom; a single shared analog to digital converter operative to convert said analog combined IF signal into a digital combined IF signal therefrom; and a receive processing path operative to filter and demodulate said digital combined IF signal and to generate a plurality of data output signals in response thereto. ### Claim 23 (depends on 22) The apparatus according to claim 22, wherein said receive processing path comprises a plurality of digital baseband processing paths. ### Claim 24 (depends on 22) The apparatus according to claim 22, wherein each RF front end RX circuit utilizes a dedicated local oscillator. ### Claim 25 (depends on 22) The apparatus according to claim 22, wherein one or more of said RF front end RX circuits utilizes an edge synthesizer coupled to a single shared local oscillator. ### Claim 26 (depends on 22) The apparatus according to claim 22, wherein at least one RF front end RX circuit is dedicated to receiving signals for linearization of transmitter components. ### Claim 27 (depends on 22) The apparatus according to claim 22, wherein at least one RF front end RX circuit is dedicated to receiving one or more auxiliary signals. ### Claim 28 A single chip radio apparatus, comprising: at least one transmitter; a plurality of RF front end receive (RX) circuits, each RX circuit comprising a dedicated analog to digital converter and operative to generate a digitized intermediate frequency (IF) signal at a particular IF frequency band; a signal combiner coupled to said plurality of RF front end RX circuits, said signal combiner operative to combine said digitized IF signals to generate a multiplexed IF signal therefrom; and a single receive processing path operative to filter and demodulate said multiplexed IF signal and to generate a plurality of data output signals in response thereto. ### Claim 29 (depends on 28) The apparatus according to claim 28, wherein said receive processing path comprises a plurality of digital baseband processing paths. ### Claim 30 (depends on 28) The apparatus according to claim 28, wherein each RF front end RX circuit utilizes a dedicated local oscillator. ### Claim 31 (depends on 28) The apparatus according to claim 28, wherein one or more of said RF front end RX circuits utilizes an edge synthesizer coupled to a single shared local oscillator. ### Claim 32 (depends on 28) The apparatus according to claim 28, wherein at least one RF front end RX circuit is dedicated to receiving signals for linearization of transmitter components. ### Claim 33 (depends on 28) The apparatus according to claim 28, wherein at least one RF front end RX circuit is dedicated to receiving one or more auxiliary signals. ### Claim 34 (depends on 28) The apparatus according to claim 28, wherein said signal combiner is operative to combine said digitized IF signals utilizing a multiplexing technique selected from the group consisting of frequency division multiplexing, code division multiple access (CDMA) and orthogonal frequency division multiple access (OFDMA). ### Claim 35 A method of simultaneous full-duplex signal reception and transmission, said method comprising the steps of: sharing a single local oscillator between a receiver and a polar transmitter during full-duplex operation; phase modulating said local oscillator to generate a modulated TX signal thereby; and removing said phase modulation from said modulated TX signal for use as a local oscillator signal by said receiver. ### Claim 36 (depends on 35) The method according to claim 35, wherein said step of removing said phase modulation comprises the step of providing two dimensional transversal of rotating capacitors in a multi-tap direct sampling mixer in said receiver. ### Claim 37 (depends on 35) The method according to claim 35, wherein said step of removing said phase modulation comprises the step of applying clock edge synthesis. ### Claim 38 (depends on 35) The method according to claim 35, wherein said step of sharing said local oscillator comprises the step of performing frequency translation from a transmit local oscillator signal to a receive local oscillator signal utilizing an edge synthesizer. ### Claim 39 A full-duplex transceiver, comprising: a local oscillator operative to be shared between a receiver and a polar transmitter during full-duplex operation; said transmitter comprising means for phase modulating said local oscillator; said receiver comprising means for removing phase modulation from said phase modulated local oscillator; a transmit processing path coupled to said transmitter and operative to generate a transmit signal in accordance with a signal input thereto; and a receive processing path coupled to said receiver and operative to generate a data output signal thereby. ### Claim 40 (depends on 39) The transceiver according to claim 39, wherein said receiver comprises a multi-tap direct sampling mixer incorporating two-dimensional transverse rotating capacitors therein. ### Claim 41 (depends on 39) The transceiver according to claim 39, wherein said step of removing said phase modulation comprises the step of applying clock edge synthesis. ### Claim 42 (depends on 39) The transceiver according to claim 39, wherein said step of sharing said local oscillator comprises the step of performing frequency translation from a transmit local oscillator signal to a receive local oscillator signal utilizing an edge synthesizer. ### Claim 43 A full-duplex transceiver, comprising: a local oscillator operative to be shared between a receiver and a polar transmitter during full duplex operation; said receiver coupled to said local oscillator operative to generate a first local oscillator clock signal; and an edge synthesizer operative to receive said first local oscillator clock signal and to synthesize a second local oscillator clock signal therefrom. ### Claim 44 (depends on 43) The transceiver according to claim 43, said transmitter comprising means for phase modulating said second local oscillator clock signal.