# US 8,542,515 B2 · Connection and addressing of multi-plane crosspoint devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,515 B2 - Document ID: US8542515B2 - Status: Granted - Kind: B2 - Application number: 13/384,872 - Filed: 2010-04-30 - Published: 2013-02-14 - Granted: 2013-09-24 - Earliest claimed: 2010-04-30 - Assignees: Hewlett-Packard Development Company, L.P. - Applicants: Frederick Perner - Inventors: Frederick Perner - Web page: https://patentgrep.com/patent/US8542515B2 ## CPC - H10B 63/84: {arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays} - H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies} - H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices} - H10N 70/8833: {Binary metal oxides, e.g. TaOx} - H10B: ELECTRONIC MEMORY DEVICES - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR ## Abstract A multi-plane circuit structure has at least a first circuit plane and a second circuit plane, and each circuit plane has a plurality of row wire segments, a plurality of column wire segments, and a plurality of crosspoint devices formed at intersections of the row wire segments and the column wire segments. The row and column wire segments have a segment length for forming a preselected number of crosspoint devices thereon. Each row wire segment in the second circuit plane is connected to a row wire segment in the first circuit plane with no offset in a row direction and in a column direction, and each column wire segment in the second circuit plane is connected to a column wire segment in the first circuit plane with an offset length in both the row direction and the column direction. The offset length corresponds to half of the preselected number of crosspoint devices. ## Claims ### Claim 1 A multi-plane circuit structure comprising: at least a first circuit plane and a second circuit plane, each of the first and second circuit planes having a plurality of row wire segments, a plurality of column wire segments, and a plurality of crosspoint devices formed at intersections of the row wire segments and the column wire segments, each of the row and column wire segments having a segment length for forming a preselected number of crosspoint devices thereon, wherein each row wire segment in the second circuit plane is connected to a row wire segment in the first circuit plane with no offset in a row direction and in a column direction, and each column wire segment in the second circuit plane is connected to a column wire segment in the first circuit plane with an offset length in both the row direction and the column direction, the offset length corresponding to half of the preselected number of crosspoint devices. ### Claim 2 (depends on 1) A multi-plane circuit structure as in claim 1, wherein each row wire segment is offset from an adjacent row wire segment in its circuit plane by one unit length in the row direction, and each column wire segment is offset from an adjacent column wire segment in its circuit plane by one unit length in the column direction, wherein a unit length corresponds to a separation between two adjacent crosspoint devices. ### Claim 3 (depends on 2) A multi-plane circuit structure as in claim 2, further including a translation layer disposed between the first and second circuit planes, wherein the translation layer includes a plurality of offset connector segments, each offset connector segment for connecting a column wire segment in the first circuit plane to a corresponding column wire segment in the second circuit plane. ### Claim 4 (depends on 3) A multi-plane circuit structure as in claim 3, wherein each row wire segment on the second circuit plane is connected at its center point by a via to the center point of a corresponding row wire segment on the first circuit plane. ### Claim 5 (depends on 4) A multi-plane circuit structure as in claim 4, wherein each offset connector segment in the translation layer connects an end of a column wire segment in the first circuit plane to the center point of a corresponding column wire segment in the second circuit plane. ### Claim 6 (depends on 5) A multi-plane circuit structure as in claim 5, further including a base connection plane, the base connection plane having a plurality of row connection vias each connected to a row wire segment in the first circuit plane, and a plurality of column connection vias each connected to a column wire segment in the first circuit plane. ### Claim 7 (depends on 1) A multi-plane circuit structure as in claim 1, wherein each crosspoint device is a memory cell. ### Claim 8 (depends on 7) A multi-plane circuit structure as in claim 7, wherein each memory cell is a resistive switching device having a first electrode formed of a portion of a row wire segment, a second electrode formed of a portion of a column wire segment, and an active region disposed between the first and second electrodes, the action region containing a switching material capable of carrying a species of dopants and transporting the dopants under an electrical field to change a resistance of the resistive switching device. ### Claim 9 (depends on 8) A multi-plane circuit structure as in claim 8, wherein the switching material is an oxide. ### Claim 10 A multi-plane circuit structure comprising: a plurality of circuit planes and one or more translation layers, each translation layer being disposed between two adjacent circuit planes; a plurality of chains of connected row wire segments, each chain of connected row wire segments having one row wire segment on each of the circuit planes; a plurality of chains of connected column wire segments, each chain of connected column wire segments having one column wire segment on each of the circuit planes, every two consecutive column wire segments in the chain being connected to an offset connector segment in a translation layer to provide an offset in both a column direction and a row direction between the two consecutive column wire segments; wherein the chains of connected row wire segments and the chains of connected column wire segments are disposed such that each chain of connected row wire segments forms at most one intersection with each chain of connected column wire segments; and a plurality of crosspoint devices each formed at one of the intersections of the chains of connected row wire segments and chains of connected column wire segments. ### Claim 11 (depends on 10) A multi-plane circuit structure as in claim 10, further including a base connection plane, the base connection plane having a plurality of row connection vias each connected to a chain of connected row wire segments, and a plurality of column connection vias each connected to a chain of connected column wire segments. ### Claim 12 (depends on 11) A multi-plane circuit structure as in claim 11, wherein the row wire segments and the column wire segments have a segment length for forming a preselected number of crosspoint devices, and the offset has a length corresponding to half of the preselected number of crosspoint devices. ### Claim 13 (depends on 12) A multi-plane circuit structure as in claim 12, wherein each offset connector segment connects an end of a column wire segment in a chain of connected column wire segments to a center point of a consecutive column wire segment in the chain. ### Claim 14 (depends on 10) A multi-plane circuit structure as in claim 10, wherein the crosspoint devices are memory cells. ### Claim 15 (depends on 14) A multi-plane circuit structure as in claim 14, wherein each memory cell is a resistive switching device having a first electrode formed of a portion of a row wire segment, a second electrode formed of a portion of a column wire segment, and an active region disposed between the first and second electrodes, the action region containing a switching material capable of carrying a species of dopants and transporting the dopants under an electrical field to change a resistance of the resistive switching device.