# US 8,542,470 B2 · Circuit configurations to reduce snapback of a transient voltage suppressor

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- Number: US 8,542,470 B2
- Document ID: US8542470B2
- Status: Granted
- Kind: B2
- Application number: 13/351,186
- Filed: 2012-01-16
- Published: 2013-01-17
- Granted: 2013-09-24
- Earliest claimed: 2006-05-31
- Assignees: Alpha and Omega Semiconductor Incorporated
- Applicants: Shekar Mallikarjunaswamy
- Inventors: Shekar Mallikarjunaswamy
- Web page: https://patentgrep.com/patent/US8542470B2

## CPC

- H10D 89/713: {including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices}
- H10D 8/80: PNPN diodes, e.g. Shockley diodes or break-over diodes
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

This invention discloses a transient voltage suppressing (TVS) circuit that includes a triggering Zener diode connected between an emitter and a collector of a bipolar-junction transistor (BJT) wherein the Zener diode having a reverse breakdown voltage BV less than or equal to a BVceo of the BJT where BVceo stands for a collector to emitter breakdown voltage with base left open. The TVS circuit further includes a rectifier connected in parallel to the BJT for triggering a rectified current through the rectifier for further limiting an increase of a reverse blocking voltage. The triggering Zener diode, the BJT and the rectifier are formed in a semiconductor substrate by implanting and configuring dopant regions of a first and a second conductivity types in an N-well and a P-well whereby the TVS can be formed in parallel as part of the manufacturing processes of the electronic device.

## Claims

### Claim 1

A method for manufacturing an electronic device with an integrated transient voltage suppressing (TVS) circuit comprising:
connecting a triggering diode between an emitter and a collector of a first bipolar-junction transistor (BJT) with said triggering diode having a reverse breakdown voltage 13V less than or equal to a BVceo of said first BJT where BVceo stands for a collector to emitter breakdown voltage with base left open;
connecting a second BJT with said first BJT forming a SCR whereas said first BJT triggering a SCR current through said SCR for further limiting an increase of a reverse blocking voltage; and
triggering said first BJT by said triggering diode for transmitting a current through said first BJT in a BJT mode by turning on said SCR at a higher reverse current than an initial current transmitting through said first BJT.

### Claim 2 (depends on 1)

The method of claim 1 further comprising:
said step of connecting said triggering diode between an emitter and a collector of a bipolar-junction transistor (BJT) comprising a step of connecting a Zener diode to a bipolar junction transistor(BJT).

### Claim 3 (depends on 1)

The method of claim 1 wherein:
said step of connecting said triggering diode between an emitter and a collector of a bipolar-junction transistor (BJT) comprising a step of connecting said diode to a NPN bipolar junction transistor(BJT).

### Claim 4 (depends on 1)

The method of claim 1 wherein:
said step of connecting said triggering diode and said SCR is a step of forming said triggering diode and said SCR on an integrated circuit (IC) chip.

### Claim 5

A method for manufacturing an electronic device with an integrated transient voltage suppressing (TVS) circuit comprising:
connecting a triggering diode between an emitter and a collector of a first bipolar-junction transistor (BJT) with said triggering diode having a reverse breakdown voltage BV less than or equal to a BVceo of said first BJT where BVceo stands for a collector to emitter breakdown voltage with base left open;
connecting a second BJT with said first BJT forming a SCR whereas said first BJT triggering a SCR current through said SCR for further limiting an increase of a reverse blocking voltage; and
connecting at least a steering diode in parallel to said triggering diode for electrically connecting to an input pad for steering a normal current between a high voltage and a low voltage terminal.

### Claim 6 (depends on 5)

The method of claim 5 further comprising:
integrating said triggering diode and said SCR with said electronic device on a single chip.

### Claim 7 (depends on 5)

The method of claim 5 further comprising:
manufacturing said triggering diode and said SCR with a standard CMOS technology and integrated with said electronic device on a single chip.

### Claim 8 (depends on 5)

The method of claim 5 further comprising:
manufacturing said triggering diode and said SCR with a standard Bi-CMOS technology and integrated with said electronic device on a single chip.

### Claim 9 (depends on 5)

The method of claim 5 further comprising:
tailored said reverse breakdown voltage BV of said triggering diode.

### Claim 10 (depends on 5)

The method of claim 5 further comprising:
suppressing a latch-up during an ESD transient between an I/O pad to a high voltage Vcc terminal of said TVS by providing a guard ring for said TVS.

### Claim 11 (depends on 5)

The method of claim 5 further comprising:
connecting a triggering Zener diode to said BJT and said rectifier further comprising a step of forming in a semiconductor substrate by implanting and configuring dopant regions of a first and a second conductivity types in a N-well and a P-well whereby said TVS can be formed in parallel as part of the manufacturing processes of said electronic device.