# US 8,542,181 B2 · Flat panel display device, controller, and method for displaying images > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,181 B2 - Document ID: US8542181B2 - Status: Granted - Kind: B2 - Application number: 11/423,149 - Filed: 2006-06-09 - Published: 2007-01-04 - Granted: 2013-09-24 - Earliest claimed: 2005-06-29 - Assignees: MStar Semiconductor, Inc. - Applicants: Sterling Smith; Chih-Tien Chang - Inventors: Sterling Smith; Chih-Tien Chang - Web page: https://patentgrep.com/patent/US8542181B2 ## CPC - G09G 3/3406: {Control of illumination source (illumination devices structurally associated with liquid crystal cells G02F1/1336)} - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/02: Improving the quality of display appearance - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/064: by time modulation of the brightness of the illumination source - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A flat panel display device, LCD controller and associated method is provided. The flat panel display device includes a display panel, a lamp for providing a backlight source for the display panel, a power transformation module for providing a power source for the lamp, a non-volatile storage unit for storing program code, and a display controller. The display controller includes an image processing module for processing image data and outputting processed results to the display panel, and a digital pulse width modulation module for adjusting on and off time of the power transformation module according to a synchronization signal. ## Claims ### Claim 1 A flat panel display device, comprising: a display panel; a lamp for providing a backlight source for the display panel; a power transformation module for providing a power source for the lamp; a non-volatile storage unit for storing program code; and a display controller fabricated on a single silicon, comprising: an image processing module for processing a video source and outputting a processed results to the display panel; and a digital pulse width modulation module for generating a pulse width modulation control signal to control the power transformation module according to an image synchronization signal received from the image processing module, the pulse width modulation control signal having a higher frequency than a frequency of the image synchronization signal, wherein the pulse width modulation control signal is adjustable for a plurality of display modes so as to associate a frequency of the pulse width modulation control signal with the image synchronization signal and synchronize the pulse width modulation control signal with the image synchronization signal in a current display mode selected from said plurality of display modes, wherein the digital pulse width modulation module comprises a pulse width modulator comprising: a phase lock loop unit generating a phase lock signal; a divider for dividing a frequency of the phase lock signal by a divisor; and a comparator generating a comparison result according to a comparison between a threshold value and a signal derived from the divider. ### Claim 2 (depends on 1) The flat panel display device of claim 1, wherein the display controller further comprises a microcontroller for performing the program code stored in the non-volatile storage unit. ### Claim 3 (depends on 2) The flat panel display device of claim 2, wherein the power transformation module comprises: a transformer having a primary end and a secondary end coupled to the lamp; and a plurality of switch transistors coupled to the primary end and the digital pulse width modulation module, for switching current direction of the primary end according to a plurality of square waveforms outputted from the digital pulse width modulation module. ### Claim 4 (depends on 2) The flat panel display device of claim 2, wherein the digital pulse width modulation module adjusts duty cycles of the square waveforms for adjusting on and off time of the power transformation module to control a luminance of the lamp. ### Claim 5 (depends on 4) The flat panel display device of claim 4, wherein the digital pulse width modulation module comprises: the pulse width modulator for generating a plurality of first square waveforms and adjusting duty cycles of the first square waveforms in response to a control signal from the microcontroller; and a control signal generation module for outputting a plurality of second square waveforms to the power transformation module during positive durations of the first square waveforms; wherein each duty cycle of the second square waveforms is smaller than that of the first square waveforms. ### Claim 6 (depends on 5) The flat panel display device of claim 5, wherein the second square waveforms comprise a first control signal and a second control signal. ### Claim 7 (depends on 6) The flat panel display device of claim 6, wherein assertion duration of the first control signal is separated from that of assertion duration of the second control signal. ### Claim 8 (depends on 5) The flat panel display device of claim 5, wherein the pulse width modulator comprises: a multiplexer for receiving an input horizontal synchronization signal and an output horizontal synchronization signal, to selectively output the input horizontal synchronization signal or the output horizontal synchronization signal; a first divider coupled to the multiplexer, for generating a first output signal by dividing a frequency of an output from the multiplexer by a first divisor; the phase lock loop unit for generating the phase lock signal; a second divider for generating a second output signal by dividing a frequency of the phase lock signal by a second divisor; a third divider for generating a third output signal by dividing a frequency of the second output signal by a third divisor; a fourth divider for generating a fourth output signal by dividing the frequency of the second output signal by a fourth divisor; and the comparator for comparing the threshold value and the fourth output signal, and outputting corresponding square waveforms to the control signal generation module; wherein the phase lock loop unit generates the phase lock signal according to the first output signal and the third output signal. ### Claim 9 (depends on 5) The flat panel display device of claim 5, wherein the digital pulse width modulation module further comprises a duty-cycle control module for adjusting duty cycles of the second square waveforms to prevent overlapping in the second square waveforms. ### Claim 10 (depends on 1) The flat panel display device of claim 1, wherein the program code stored in the non-volatile storage unit comprises controlling a frequency of signals outputted from the digital pulse width modulation module according to a horizontal synchronization signal and a vertical synchronization signal generated by the image processing module. ### Claim 11 (depends on 1) The flat panel display device of claim 1, further comprising: a feedback circuit coupled to the lamp for outputting a sensing current of the lamp; and an analog to digital converter coupled between the feedback circuit and the display controller, for converting analog signals outputted from the feedback circuit into digital signals. ### Claim 12 (depends on 11) The flat panel display device of claim 11, wherein the microcontroller controls a frequency of signals outputted from the digital pulse width modulation module according to the digital signals outputted from the analog to digital converter. ### Claim 13 (depends on 11) The flat panel display device of claim 11, further comprises an adjustment module coupled to the analog to digital converter, for adjusting a plurality of display functions of the display controller, comprising: a power source; a resistor coupled to the power source; a resistor sequence coupled to the resistor, comprising a plurality of resistors in series connection; a plurality of switches each coupled between the resistor sequence and ground; and an output terminal between the resistor and the resistor sequence, for outputting voltage to the analog to digital converter. ### Claim 14 A display controller of a flat panel display device, the display controller fabricated on a single silicon, the display controller comprising: an image processing module for processing image data; and a digital pulse width modulation module coupled to the image processing module and an external application circuit, for generating a set of control signals for controlling the external application circuit according to an image synchronization signal received from the image processing module, the set of control signals having a higher frequency than a frequency of the image synchronization signal, wherein the set of control signals are adjustable for a plurality of display modes so as to associate a frequency of the control signals with the image synchronization signal and synchronize the set of control signals with the image synchronization signal in a current display mode selected from said plurality of display modes, wherein the digital pulse width modulation module comprises a pulse width modulator comprising: a phase lock loop unit generating a phase lock signal; a divider for dividing a frequency of the phase lock signal by a divisor; and a comparator generating a comparison result according to a comparison between a threshold value and a signal derived from the divider. ### Claim 15 (depends on 14) The display controller of claim 14, wherein the external application circuit is a power transformation module for providing an alternating-current voltage. ### Claim 16 (depends on 14) The display controller of claim 14, wherein the external application circuit is a power transformation module for driving a plurality of light emitting diodes. ### Claim 17 (depends on 14) The display controller of claim 14, wherein the external application circuit is a power transformation module for driving a lamp. ### Claim 18 (depends on 17) The display controller of claim 17, wherein the lamp is a cold cathode fluorescent lamp. ### Claim 19 (depends on 14) The display controller of claim 14, wherein the image synchronization signal is an input horizontal synchronization signal. ### Claim 20 (depends on 14) The display controller of claim 14, wherein the image synchronization signal is an output horizontal synchronization signal. ### Claim 21 (depends on 18) The display controller of claim 18, wherein the external application circuit controls on and off time of the cold cathode fluorescent lamp. ### Claim 22 (depends on 14) The display controller of claim 14, wherein the digital pulse width modulation module adjusts duty cycles of square waveforms for adjusting on and off time of the power transformation module for controlling luminance of the lamp. ### Claim 23 (depends on 14) The display controller of claim 14, wherein the digital pulse width modulation module comprises: the pulse width modulator for generating a plurality of first square waveforms and adjusting duty cycles of the first square waveforms according to signals outputted from the image processing module; and a control signal generation module for outputting a plurality of second square waveforms to the external application circuit during positive durations of the first square waveforms; wherein each duty cycle of the second square waveforms is smaller than that of the first square waveforms. ### Claim 24 (depends on 23) The display controller of claim 23, wherein the second square waveforms are formed by interlacing a first control signal and a second control signal, and assertion duration of the first control signal is separated from that of assertion duration of the second control signal. ### Claim 25 (depends on 23) The display controller of claim 23, wherein the pulse width modulator comprises: a multiplexer for receiving an input horizontal synchronization signal and an output horizontal synchronization signal, to selectively output the input horizontal synchronization signal or the output horizontal synchronization signal; a first divider coupled to the multiplexer, for generating a first output signal by dividing a frequency of an output from the multiplexer by a first divisor; the phase lock loop unit for generating the phase lock signal; a second divider for generating a second output signal by dividing a frequency of the phase lock signal by a second divisor; a third divider for generating a third output signal by dividing a frequency of the second output signal by a third divisor; a fourth divider for generating a fourth output signal by dividing the frequency of the second output signal by a fourth divisor; and the comparator for comparing the threshold value and the fourth output signal, to generate a comparison output to the control signal generation module; wherein the phase lock loop unit generates the phase lock signal according to the first output signal and the third output signal. ### Claim 26 (depends on 23) The display controller of claim 23, wherein the digital pulse width modulation module further comprises a duty-cycle control module for adjusting duty cycles of the second square waveforms to prevent overlapping in the second square waveforms. ### Claim 27 (depends on 14) The display controller of claim 14, wherein the image synchronization signal is a horizontal synchronization signal and the set of control signals associate with a vertical synchronization signal. ### Claim 28 (depends on 1) The flat panel display device of claim 1, wherein the frequency of the pulse width modulation control signal is programmable and is proportional to the frequency of the image synchronization signal. ### Claim 29 (depends on 1) The flat panel display device of claim 1, wherein the frequency of the pulse width modulation control signal is an integral multiple of the frequency of the image synchronization signal. ### Claim 30 (depends on 1) The flat panel display device of claim 1, wherein the image synchronization signal includes a horizontal synchronization signal and a vertical horizontal synchronization signal, so that the frequency of the pulse width modulation control signal is associated with the frequency of the horizontal synchronization signal and the frequency of the vertical synchronization signal. ### Claim 31 (depends on 14) The display controller of claim 14, wherein the frequency of the control signals is programmable and is proportional to the frequency of the image synchronization signal. ### Claim 32 (depends on 14) The display controller of claim 14, wherein the frequency of the control signals is an integral multiple of the frequency of the image synchronization signal.