# US 8,542,164 B2 · Display device

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- Number: US 8,542,164 B2
- Document ID: US8542164B2
- Status: Granted
- Kind: B2
- Application number: 12/726,409
- Filed: 2010-03-18
- Published: 2010-07-08
- Granted: 2013-09-24
- Earliest claimed: 2005-11-30
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Hajime Kimura
- Inventors: Hajime Kimura
- Web page: https://patentgrep.com/patent/US8542164B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/325: the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
- G09G 2300/0465: Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G 2330/04: Display protection
- H10K 59/12: Active-matrix OLED [AMOLED] displays
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

To provide a high-performance and highly reliable display device with a high aperture ratio, including light-emitting elements, and a manufacturing method thereof, and a technique for manufacturing such a display device at a low cost with high productivity. A compensating circuit, a light-emitting element, a switch, and a transistor are included, in which one terminal of the switch is electrically connected to the compensating circuit, a gate of the transistor is electrically connected to the compensating circuit, one of a source and a drain of the transistor is electrically connected to a first electrode of the light-emitting element, the other of the source and the drain of the transistor is maintained at a certain potential, and a second electrode of the light-emitting element and the other terminal of the switch are electrically connected to the same wire.

## Claims

### Claim 1

A display device comprising:
a wiring;
a light emitting element including a first electrode, an electroluminescent layer over the first electrode and a second electrode over the electroluminescent layer wherein the second electrode of the light emitting element is electrically connected to the wiring;
a capacitor including a first electrode and a second electrode;
a first transistor wherein one of a source and a drain of the first transistor is electrically connected to the first electrode of the light emitting element;
a second transistor wherein one of a source and a drain of the second transistor is electrically connected to the wiring and the other of the source and the drain of the second transistor is electrically connected to the first electrode of the capacitor;
a third transistor wherein a gate of the third transistor is electrically connected to the first electrode of the capacitor and one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor;
a fourth transistor wherein a gate of the fourth transistor is electrically connected to a gate of the first transistor and one of a source and a drain of the fourth transistor is electrically connected to the other of the source and the drain of the third transistor;
a fifth transistor wherein one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the second transistor; and
a sixth transistor wherein one of a source and a drain of the sixth transistor is electrically connected to the other of the source and the drain of the third transistor.

### Claim 2 (depends on 1)

A display device according to claim 1, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including an oxide semiconductor.

### Claim 3 (depends on 1)

A display device according to claim 1, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including ZnO, In and Ga.

### Claim 4

A display device comprising:
a first wiring;
a second wiring;
a light emitting element including a first electrode, an electroluminescent layer over the first electrode and a second electrode over the electroluminescent layer wherein the second electrode of the light emitting element is electrically connected to the first wiring;
a capacitor including a first electrode and a second electrode;
a first transistor wherein one of a source and a drain of the first transistor is electrically connected to the first electrode of the light emitting element;
a second transistor wherein one of a source and a drain of the second transistor is electrically connected to the first wiring and the other of the source and the drain of the second transistor is electrically connected to the first electrode of the capacitor;
a third transistor wherein a gate of the third transistor is electrically connected to the first electrode of the capacitor and one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor;
a fourth transistor wherein a gate of the fourth transistor is electrically connected to a gate of the first transistor and one of a source and a drain of the fourth transistor is electrically connected to the other of the source and the drain of the third transistor;
a fifth transistor wherein one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the second transistor; and
a sixth transistor wherein one of a source and a drain of the sixth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the sixth transistor is electrically connected to the second wiring.

### Claim 5 (depends on 4)

A display device according to claim 4, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including an oxide semiconductor.

### Claim 6 (depends on 4)

A display device according to claim 4, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including ZnO, In and Ga.

### Claim 7

A display device comprising:
a first wiring;
a second wiring;
a third wiring;
a light emitting element including a first electrode, an electroluminescent layer over the first electrode and a second electrode over the electroluminescent layer wherein the second electrode of the light emitting element is electrically connected to the first wiring;
a capacitor including a first electrode and a second electrode wherein the second electrode of the capacitor is electrically connected to the third wiring;
a first transistor wherein one of a source and a drain of the first transistor is electrically connected to the first electrode of the light emitting element;
a second transistor wherein one of a source and a drain of the second transistor is electrically connected to the first wiring and the other of the source and the drain of the second transistor is electrically connected to the first electrode of the capacitor;
a third transistor wherein a gate of the third transistor is electrically connected to the first electrode of the capacitor and one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor;
a fourth transistor wherein a gate of the fourth transistor is electrically connected to a gate of the first transistor, one of a source and a drain of the fourth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor is electrically connected to the third wiring;
a fifth transistor wherein one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the second transistor; and
a sixth transistor wherein one of a source and a drain of the sixth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the sixth transistor is electrically connected to the second wiring.

### Claim 8 (depends on 7)

A display device according to claim 7, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including an oxide semiconductor.

### Claim 9 (depends on 7)

A display device according to claim 7, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including ZnO, In and Ga.

### Claim 10

A display device comprising:
a first wiring;
a second wiring;
a third wiring;
a fourth wiring;
a light emitting element including a first electrode, an electroluminescent layer over the first electrode and a second electrode over the electroluminescent layer wherein the second electrode of the light emitting element is electrically connected to the first wiring;
a capacitor including a first electrode and a second electrode wherein the second electrode of the capacitor is electrically connected to the third wiring;
a first transistor wherein one of a source and a drain of the first transistor is electrically connected to the first electrode of the light emitting element;
a second transistor wherein a gate of the second transistor is electrically connected to the fourth wiring, one of a source and a drain of the second transistor is electrically connected to the first wiring and the other of the source and the drain of the second transistor is electrically connected to the first electrode of the capacitor;
a third transistor wherein a gate of the third transistor is electrically connected to the first electrode of the capacitor and one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor;
a fourth transistor wherein a gate of the fourth transistor is electrically connected to a gate of the first transistor, one of a source and a drain of the fourth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor is electrically connected to the third wiring;
a fifth transistor wherein one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the second transistor; and
a sixth transistor wherein one of a source and a drain of the sixth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the sixth transistor is electrically connected to the second wiring.

### Claim 11 (depends on 10)

A display device according to claim 10, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including an oxide semiconductor.

### Claim 12 (depends on 10)

A display device according to claim 10, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including ZnO, In and Ga.

### Claim 13

A display device comprising:
a first wiring;
a second wiring;
a third wiring;
a fourth wiring;
a fifth wiring;
a light emitting element including a first electrode, an electroluminescent layer over the first electrode and a second electrode over the electroluminescent layer wherein the second electrode of the light emitting element is electrically connected to the first wiring;
a capacitor including a first electrode and a second electrode wherein the second electrode of the capacitor is electrically connected to the third wiring;
a first transistor wherein one of a source and a drain of the first transistor is electrically connected to the first electrode of the light emitting element;
a second transistor wherein a gate of the second transistor is electrically connected to the fourth wiring, one of a source and a drain of the second transistor is electrically connected to the first wiring and the other of the source and the drain of the second transistor is electrically connected to the first electrode of the capacitor;
a third transistor wherein a gate of the third transistor is electrically connected to the first electrode of the capacitor and one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the first transistor;
a fourth transistor wherein a gate of the fourth transistor is electrically connected to a gate of the first transistor, one of a source and a drain of the fourth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the fourth transistor is electrically connected to the third wiring;
a fifth transistor wherein a gate of the fifth transistor is electrically connected to the fifth wiring, one of a source and a drain of the fifth transistor is electrically connected to the other of the source and the drain of the first transistor and the other of the source and the drain of the fifth transistor is electrically connected to the other of the source and the drain of the second transistor; and
a sixth transistor wherein a gate of the sixth transistor is electrically connected to the fifth wiring, one of a source and a drain of the sixth transistor is electrically connected to the other of the source and the drain of the third transistor and the other of the source and the drain of the sixth transistor is electrically connected to the second wiring.

### Claim 14 (depends on 13)

A display device according to claim 13, wherein the gate of the first transistor is electrically connected to the fifth wiring.

### Claim 15 (depends on 13)

A display device according to claim 13, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including an oxide semiconductor.

### Claim 16 (depends on 13)

A display device according to claim 13, wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor comprises a semiconductor layer including ZnO, In and Ga.

### Claim 17 (depends on 1)

A display device according to claim 1, wherein a gate of the fifth transistor is electrically connected to a gate of the sixth transistor.

### Claim 18 (depends on 4)

A display device according to claim 4, wherein a gate of the fifth transistor is electrically connected to a gate of the sixth transistor.

### Claim 19 (depends on 7)

A display device according to claim 7, wherein a gate of the fifth transistor is electrically connected to a gate of the sixth transistor.

### Claim 20 (depends on 10)

A display device according to claim 10, wherein a gate of the fifth transistor is electrically connected to a gate of the sixth transistor.

### Claim 21 (depends on 1)

A display device according to claim 1, wherein each of the second transistor and the fifth transistor has a double-gate structure.

### Claim 22 (depends on 4)

A display device according to claim 4, wherein each of the second transistor and the fifth transistor has a double-gate structure.

### Claim 23 (depends on 7)

A display device according to claim 7, wherein each of the second transistor and the fifth transistor has a double-gate structure.

### Claim 24 (depends on 10)

A display device according to claim 10, wherein each of the second transistor and the fifth transistor has a double-gate structure.

### Claim 25 (depends on 13)

A display device according to claim 13, wherein each of the second transistor and the fifth transistor has a double-gate structure.