# US 8,542,139 B2 · Current switch driving circuit and digital to analog converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,139 B2 - Document ID: US8542139B2 - Status: Granted - Kind: B2 - Application number: 13/310,606 - Filed: 2011-12-02 - Published: 2012-06-21 - Granted: 2013-09-24 - Earliest claimed: 2010-12-16 - Assignees: Electronics and Telecommunications Research Institute - Applicants: Min-Hyung Cho; Yi-Gyeong Kim; Jong-Kee Kwon - Inventors: Min-Hyung Cho; Yi-Gyeong Kim; Jong-Kee Kwon - Web page: https://patentgrep.com/patent/US8542139B2 ## CPC - H03K 17/04106: {in field-effect transistor switches (H03K17/0412, H03K17/0416 take precedence)} - H03M 1/06: Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, {e.g. by using stored correction values,} H03M1/10) - H03M 1/66: Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract Provided are a current switch driving circuit generating a signal for driving a current switch, and a digital-to-analog converter using the same. The current switch driving circuit includes a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal, an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal, a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a control current source allowing the second PMOS transistor to be maintained constantly in an ON state. ## Claims ### Claim 1 A current switch driving circuit, comprising: a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal; an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor and a gate terminal receives the input signal; a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal; and a controller allowing the second PMOS transistor to be maintained constantly in an ON state. ### Claim 2 (depends on 1) The current switch driving circuit of claim 1, wherein the controller comprises a control current source. ### Claim 3 (depends on 2) The current switch driving circuit of claim 2, wherein the control current source is connected to the source terminal of the second PMOS transistor, and injects a current to the source terminal of the second PMOS transistor. ### Claim 4 (depends on 3) The current switch driving circuit of claim 3, wherein a bias voltage of the bias voltage terminal is 0 V, and the gate terminal of the second PMOS transistor is connected to the drain terminal of the second PMOS transistor. ### Claim 5 A current switch driving circuit, comprising: a first NMOS transistor in which a source terminal is connected to a ground terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal; a PMOS transistor in which a drain terminal is connected to the drain terminal of the first NMOS transistor, and a gate terminal receives the input signal; a second NMOS in which a source terminal is connected to a source terminal of the PMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a power supply terminal; and a controller allowing the second NMOS transistor to be maintained constantly in an ON state. ### Claim 6 (depends on 5) The current switch driving circuit of claim 5, wherein the controller comprises a control current source. ### Claim 7 (depends on 6) The current switch driving circuit of claim 6, wherein the control current source is connected to the source terminal of the second NMOS transistor and allows a current to flow from the source terminal of the second NMOS transistor to the ground terminal. ### Claim 8 (depends on 7) The current switch driving circuit of claim 7, wherein a bias voltage of the bias voltage terminal is 0 V, and the gate terminal of the second NMOS transistor is connected to the drain terminal of the second NMOS transistor. ### Claim 9 A digital-to-analog converter, comprising: a conversion part for converting a digital signal to an analog signal; a current source for generating a current of a predetermined magnitude; a current switch for determining an output direction of the current generated from the current source; and a current switch driving circuit for generating a digital driving signal for driving the current switch, wherein the digital driving signal of a high level is a power supply voltage, and the digital driving signal of a low level is lower than the power supply voltage and is a positive voltage. ### Claim 10 (depends on 9) The digital-to-analog converter of claim 9, wherein the current switch driving circuit comprises: a first PMOS transistor in which a source terminal is connected to a power supply terminal of the power supply voltage, a gate terminal receives an input signal, and a drain terminal outputs a driving signal; an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal; a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a controller allowing the second PMOS transistor to be maintained constantly in an ON state. ### Claim 11 (depends on 9) The digital-to-analog converter of claim 9, wherein the current switch driving circuit comprises: a first NMOS transistor in which a source terminal is connected to a ground terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal; a PMOS transistor in which a drain terminal is connected to the drain terminal of the first NMOS transistor, and a gate terminal receives the input signal; a second NMOS transistor in which a source terminal is connected to a source terminal of the PMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a power supply terminal of the power supply voltage, and a controller allowing the second NMOS transistor to be maintained constantly in an ON state.