# US 8,542,067 B2 · Oscillation circuit and image display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,067 B2 - Document ID: US8542067B2 - Status: Granted - Kind: B2 - Application number: 13/121,050 - Filed: 2009-09-29 - Published: 2011-07-21 - Granted: 2013-09-24 - Earliest claimed: 2008-09-29 - Assignees: Fujitsu Ten Limited - Applicants: Satoru Uehara; Keiji Furukawa - Inventors: Satoru Uehara; Keiji Furukawa - Web page: https://patentgrep.com/patent/US8542067B2 ## CPC - G09G 5/008: {Clock recovery} - H03L 7/18: using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) - G09G 3/3611: {Control of matrices with row and column drivers} - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) ## Abstract Disclosed is an oscillation circuit. The oscillation circuit supplies predetermined oscillation signals to a generating circuit having a divider, a phase comparator, and a generator. A clock signal generating section generates clock signals in a cycle based on the comparison results from the phase comparator. A clock signal mask section masks a part of the clock signals generated by the clock signal generating section to generate the predetermined oscillation signals and supplies the predetermined oscillation signals to the divider. The clock signal mask section masks a part of the clock signals such that the cycle of sampling signals generated by the generator is the same as a predetermined cycle which is the cycle of a clock for use in generating image signals. ## Claims ### Claim 1 An oscillation circuit that supplies predetermined oscillation signals to a generating circuit having: a divider which has a fixed division ratio, divides the predetermined oscillation signals with the division ratio and outputs divided signals; a phase comparator which compares a phase difference between a phase of a synchronization signal in image signals and a phase of the divided signals output from the divider; and a generator which generates sampling signals in a cycle based on comparison results from the phase comparator, the oscillation circuit comprising: a clock signal generating section that generates clock signals in the cycle based on the comparison results from the phase comparator; and a clock signal mask section which masks a part of the clock signals generated by the clock signal generating section to generate the predetermined oscillation signals and supplies the predetermined oscillation signals to the divider, wherein the clock signal mask section masks a part of the clock signals such that the cycle of the sampling signals generated by the generator is the same as a predetermined cycle which is the cycle of a clock for use in generating the image signals. ### Claim 2 (depends on 1) The oscillation circuit as set forth in claim 1, wherein the clock signal mask section masks a predetermined number of clocks of the clock signals, and the predetermined number is determined on the basis of the predetermined cycle and the division ratio of the divider. ### Claim 3 (depends on 1) The oscillation circuit as set forth in claim 1, wherein the generator outputs a synchronization signal synchronized with the sampling signals to the clock signal mask section, and wherein the clock signal mask section masks a part of the clock signals on the basis of the synchronization signal output from the generator. ### Claim 4 (depends on 3) The oscillation circuit as set forth in claim 3, wherein the clock signal mask section starts to mask the clock signals immediately after the synchronization signal output from the generator is input. ### Claim 5 (depends on 3) The oscillation circuit as set forth in claim 3, wherein the clock signal mask section starts to mask the clock signals when a predetermined time is elapsed after the synchronization signal output from the generator is received. ### Claim 6 (depends on 1) The oscillation circuit as set forth in claim 1, wherein the clock signal mask section starts to mask the clock signals when a predetermined time is elapsed after the generator starts to generate the sampling signals. ### Claim 7 (depends on 6) The oscillation circuit as set forth in claim 6, further comprising a switch configured to supply the clock signals generated by the clock signal generating section directly to the divider while bypassing the clock signal mask section for a predetermined time after the generator starts to generate the sampling signals. ### Claim 8 (depends on 6) The oscillation circuit as set forth in claim 6, further comprising a switch configured to cut the synchronization signal output from the generator for a predetermined time after the generator starts to generate the sampling signals. ### Claim 9 An image display device that receives image signals to display images, the image display device comprising: an image display circuit that samples the image signals with sampling signals to display the images; a generating circuit that generates the sampling signals supplied to the image display circuit; and an oscillation circuit that supplies predetermined oscillation signals to the generating circuit, wherein the generating circuit has: a divider which has a fixed division ratio, divides the predetermined oscillation signals with the division ratio and outputs divided signals; a phase comparator which compares a phase difference between a phase of a synchronization signal in the image signals and a phase of the divided signals output from the divider; and a generator which generates the sampling signals in a cycle based on comparison results from the phase comparator, wherein the oscillation circuit includes a clock signal generating section which generates clock signals in the cycle based on the comparison results from the phase comparator, and a clock signal mask section which masks a part of the clock signals generated by the clock signal generating section to generate the predetermined oscillation signals and supplies the predetermined oscillation signals to the divider, and wherein the clock signal mask section masks a part of the clock signals such that the cycle of the sampling signals generated by the generator is the same as a predetermined cycle which is the cycle of a clock for use in generating the image signals.