# US 8,542,059 B2 · Ultra-low-power power supply system for an IC chip > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,059 B2 - Document ID: US8542059B2 - Status: Granted - Kind: B2 - Application number: 13/158,913 - Filed: 2011-06-13 - Published: 2012-12-13 - Granted: 2013-09-24 - Earliest claimed: 2011-06-13 - Assignees: Analog Devices, Inc. - Applicants: Jose Tejada; Alberto Sanchez - Inventors: Jose Tejada; Alberto Sanchez - Web page: https://patentgrep.com/patent/US8542059B2 ## CPC - G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)} - G11C 5/143: {Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels (G11C5/148 takes precedence); Switching between alternative supplies (G11C5/141 takes precedence)} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Embodiments of the present invention may provide a power supply system that uses a capacitive voltage divider to selectively monitor various power supplies on an IC chip. The power supply system may sample a monitored power supply to a capacitor and select certain capacitors from a set of switched capacitors to divide down the sampled voltage. The resulting voltage may be compared to a voltage reference. Using different selections of switched capacitors, the monitored power supply may be compared for different voltage levels. The ratio of the sampling capacitor to the selected capacitors may determine a voltage level the comparator will trigger. Further, based on the monitored power supply level, the power supply system may turn on a switch between an external power supply and a regulated digital power supply to charge the regulated digital power supply while a main LDO is turned off. ## Claims ### Claim 1 A power supply circuit, comprising: a power supply line for a power supply; a capacitive voltage divider having an input switch, an input capacitor, a plurality of switched capacitors and an output capacitor, the capacitive voltage divider to sample a voltage level of the power supply line by closing the input switch, and to generate a divided sampled voltage on the output capacitor by selectively connecting the switched capacitors; a comparator coupled to the output capacitor to compare the divided sampled voltage to a reference voltage; and a control circuit to control the capacitive voltage divider for closing the input switch and selecting the switched capacitors. ### Claim 2 (depends on 1) The power supply circuit of claim 1, further comprising: a second power supply line for a second power supply; and a first charging switch connected between the power supply line and the second power supply line; wherein the capacitive voltage divider further includes a second input switch to connect the input capacitor to the second power supply line. ### Claim 3 (depends on 2) The power supply circuit of claim 2, wherein the capacitive voltage divider further includes: a share switch to connect the input capacitor to the output capacitor to generate the divided sampled voltage on the output capacitor, a plurality of dividing switches each to connect a respective switched capacitor to the output capacitor, and a clear switch to clear electrical charges on the input capacitor, output capacitor and switched capacitors to ground. ### Claim 4 (depends on 3) The power supply circuit of claim 3, wherein the plurality of switched capacitors are binary weighted capacitors. ### Claim 5 (depends on 3) The power supply circuit of claim 3, wherein the plurality of switched capacitors each has unit capacitance that matches unit capacitance of the input and output capacitors. ### Claim 6 (depends on 5) The power supply circuit of claim 5, further comprising a third power supply line and a second charging switch, wherein the capacitive voltage divider further includes a third input switch to connect the input capacitor to the third power supply line. ### Claim 7 (depends on 6) The power supply circuit of claim 6, wherein the control circuit controls the input switches, share switch, clear switch and the plurality of dividing switches to periodically test voltage levels for each of the power supply lines. ### Claim 8 (depends on 2) The power supply circuit of claim 2, wherein in a standby mode of operation, the control circuit controls opening and closing of the first charging switch to maintain the voltage level on the second power supply line between a high threshold and a low threshold. ### Claim 9 (depends on 1) The power supply circuit of claim 1, wherein the power supply line is a supply for other circuits of a common integrated circuit. ### Claim 10 An IC chip, comprising: a power supply circuit, comprising: a power supply line for a power supply; a capacitive voltage divider having an input switch, an input capacitor, a plurality of switched capacitors and an output capacitor, the capacitive voltage divider to sample a voltage level of the power supply line by closing the input switch, and to generate a divided sampled voltage on the output capacitor by selectively connecting the switched capacitors; a comparator coupled to the output capacitor to compare the divided sampled voltage to a reference voltage; and a control circuit to control the capacitive voltage divider for closing the input switch and selecting the switched capacitors. ### Claim 11 (depends on 10) The IC chip of claim 10, wherein the power supply circuit further comprises: a second power supply line for a second power supply; and a first charging switch connected between the power supply line and the second power supply line; wherein the capacitive voltage divider further includes a second input switch to connect the input capacitor to the second power supply line. ### Claim 12 (depends on 11) The IC chip of claim 11, wherein the capacitive voltage divider further includes: a share switch to connect the input capacitor to the output capacitor to generate the divided sampled voltage on the output capacitor, a plurality of dividing switches each to connect a respective switched capacitor to the output capacitor, and a clear switch to clear electrical charges on the input capacitor, output capacitor and switched capacitors to ground. ### Claim 13 (depends on 12) The IC chip of claim 12, wherein the plurality of switched capacitors are binary weighted capacitors. ### Claim 14 (depends on 12) The IC chip of claim 12, wherein the plurality of switched capacitors each has unit capacitance that matches unit capacitance of the input and output capacitors. ### Claim 15 (depends on 14) The IC chip of claim 14, further comprising a third power supply line and a second charging switch, wherein the capacitive voltage divider further includes a third input switch to connect the input capacitor to the third power supply line. ### Claim 16 (depends on 15) The IC chip of claim 15, wherein the control circuit controls the input switches, share switch, clear switch and the plurality of dividing switches to periodically test voltage levels for each of the power supply lines. ### Claim 17 (depends on 11) The IC chip of claim 11, wherein in a standby mode of operation, the control circuit controls opening and closing of the first charging switch to maintain the voltage level on the second power supply line between a high threshold and a low threshold. ### Claim 18 (depends on 11) The IC chip of claim 11, further comprising a digital logic block for a microcontroller and memories connected to the second power supply line to receive power. ### Claim 19 (depends on 10) The IC chip of claim 10, wherein the power supply line is a supply for other circuits of the IC chip. ### Claim 20 A method to control power supply for an IC chip, comprising: sample a voltage level on a power supply line on the IC chip; select one or more switched capacitors from a plurality of switched capacitors to generate a divided sampled voltage level; compare the divided sampled voltage level to a reference voltage; and determine the voltage level of the power supply line. ### Claim 21 (depends on 20) The method of claim 20, wherein the power supply line is periodically selected from a plurality of power supply lines. ### Claim 22 (depends on 20) The method of claim 20, wherein sampling is performed by closing an input switch connected between the power supply line and an input capacitor. ### Claim 23 (depends on 22) The method of claim 22, further including: connecting a clear switch to clear electrical charges on the input capacitor, an output capacitor and the switched capacitors to ground. ### Claim 24 (depends on 20) The method of claim 20, further including, in a standby mode of operation, connecting a charging switch to maintain the voltage level on the power supply line between a high threshold and a low threshold.