# US 8,542,050 B2 · Minimized line skew generator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,050 B2 - Document ID: US8542050B2 - Status: Granted - Kind: B2 - Application number: 11/410,352 - Filed: 2006-04-24 - Published: 2007-05-03 - Granted: 2013-09-24 - Earliest claimed: 2005-10-28 - Assignees: Sony Corporation; Sony Electronics Inc. - Applicants: Jae-Hyeong Kim; Patrick T. Chuang; Chungji Lu - Inventors: Jae-Hyeong Kim; Patrick T. Chuang; Chungji Lu - Web page: https://patentgrep.com/patent/US8542050B2 ## CPC - G06F 1/10: Distribution of clock signals {, e.g. skew} - G11C 7/22: Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management - G11C 7/222: {Clock generating, synchronizing or distributing circuits within memory device} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract The system described herein provides a minimized skew generator that has very small timing variation. Four phase signals are compressed into one signal including the four phase information. Therefore, the signal with all of the phase information travels on the same line, thus avoiding the concerns of skewing based on different sizes of metal lines. Since there are two rising edges and two falling edges within one signal, an enable line is utilized to select between the first and second, rising and falling edges. With this processing, the system has only one critical signal output, thus requiring only one signal line. Skewing of the signals and the amount of power required are both reduced. ## Claims ### Claim 1 A system for minimizing timing skew comprising: one or more clock pulse generators for generating a four phase clock signal; a single clock signal line coupled to the one or more clock pulse generators for receiving and delivering the four phase clock signal; one or more enable pulse generators for generating a four phase enable signal; and a single enable signal line coupled to the one or more enable pulse generators for receiving and delivering the four phase enable signal. ### Claim 2 (depends on 1) The system as claimed in claim 1 wherein the four phase clock signal comprises a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle. ### Claim 3 (depends on 2) The system as claimed in claim 2 wherein the first rising edge contains 0 degree information and the second rising edge contains 180 degree information. ### Claim 4 (depends on 2) The system as claimed in claim 2 wherein the first falling edge contains 90degree information and the second falling edge contains 270 degree information. ### Claim 5 (depends on 2) The system as claimed in claim 2 further comprising a receiver coupled to the single clock signal line to receive the four phase clock signal and coupled to the single enable signal line to receive the four phase enable signal, wherein the receiver is configured to apply the four phase enable signal to distinguish the first rising edge from the second rising edge. ### Claim 6 (depends on 2) The system as claimed in claim 2 wherein a latch is used to distinguish the first falling edge and the second falling edge. ### Claim 7 (depends on 1) The system as claimed in claim 1 wherein the one or more clock pulse generators comprise a 0 degree pulse generator for generating a first pulse that triggers a first transistor; a 90 degree pulse generator for generating a second pulse that triggers a second transistor; a 180 degree pulse generator for generating a third pulse that triggers a third transistor; and a 270 degree pulse generator for generating a fourth pulse that triggers a fourth transistor. ### Claim 8 (depends on 7) The system as claimed in claim 7 wherein the one or more enable pulse generators comprise a 90 degree pulse generator for generating a fifth pulse that triggers a fifth transistor and a 270 degree pulse generator for generating a sixth pulse that triggers a sixth transistor. ### Claim 9 (depends on 1) The system as claimed in claim 1 wherein the four phase enable signal contains two transitions in one cycle. ### Claim 10 A system for minimizing timing skew comprising: one or more clock pulse generators for generating a four phase clock signal; one or more enable pulse generators for generating a four phase enable signal; a single clock signal line for carrying the four phase clock signal and a single enable signal line for carrying the four phase enable signal; a first driver for driving the four phase clock signal coupled to the single clock signal line; and a second driver for driving the four phase enable signal coupled to the single enable signal line. ### Claim 11 (depends on 10) The system as claimed in claim 10 wherein the four phase clock signal comprises a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle. ### Claim 12 (depends on 11) The system as claimed in claim 11 wherein the first rising edge contains 0 degree information and the second rising edge contains 180 degree information. ### Claim 13 (depends on 11) The system as claimed in claim 11 wherein the first falling edge contains 90 degree information and the second falling edge contains 270 degree information. ### Claim 14 (depends on 11) The system as claimed in claim 11 further comprising a receiver coupled to the single clock signal line to receive the four phase clock signal and coupled to the single enable signal line to receive the four phase enable signal, wherein the receiver is configured to apply the four phase enable signal to distinguish the first rising edge from the second rising edge. ### Claim 15 (depends on 11) The system as claimed in claim 11 wherein a latch is used to distinguish the first falling edge and the second falling edge. ### Claim 16 (depends on 11) The system as claimed in claim 11 wherein the one or more clock pulse generators comprise a 0 degree pulse generator for generating a first pulse that triggers a first transistor; a 90 degree pulse generator for generating a second pulse that triggers a second transistor; a 180 degree pulse generator for generating a third pulse that triggers a third transistor; and a 270 degree pulse generator for generating a fourth pulse that triggers a fourth transistor. ### Claim 17 (depends on 16) The system as claimed in claim 16 wherein the one or more enable pulse generators comprise a 90 degree pulse generator for generating a fifth pulse that triggers a fifth transistor and a 270 degree pulse generator for generating a sixth pulse that triggers a sixth transistor. ### Claim 18 (depends on 10) The system as claimed in claim 10 wherein the four phase enable signal contains two transitions in one cycle. ### Claim 19 A method of minimizing skew comprising: compressing four phase clock signals into one compressed four phase clock signal; generating a four phase enable signal; and delivering the one compressed four phase clock signal on a single clock signal line and the four phase enable signal on a single enable signal line to one or more receivers. ### Claim 20 (depends on 19) The method as claimed in claim 19 wherein the one compressed four phase signal comprises a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle. ### Claim 21 (depends on 20) The method as claimed in claim 20 wherein the first rising edge contains 0 degree information and the second rising edge contains 180 degree information. ### Claim 22 (depends on 20) The method as claimed in claim 20 wherein the first falling edge contains 90 degree information and the second falling edge contains 270 degree information. ### Claim 23 (depends on 20) The method as claimed in claim 20 wherein the four phase enable signal is used to distinguish the first rising edge and the second rising edge. ### Claim 24 (depends on 20) The method as claimed in claim 20 wherein a latch is used to distinguish the first falling edge and the second falling edge. ### Claim 25 (depends on 19) The method as claimed in claim 19 wherein the four phase enable signal contains two transitions in one cycle. ### Claim 26 A system for minimizing timing skew comprising: a clock pulse generator for generating a four phase clock signal comprising a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle; a single clock signal line coupled to the clock pulse generator for receiving and delivering the four phase clock signal; an enable pulse generator for generating a four phase enable signal which contains two transitions in one cycle and is used to distinguish the first falling edge and the second falling edge; and a single enable signal line coupled to the enable pulse generator for receiving and delivering the four phase enable signal. ### Claim 27 A method of minimizing skew comprising: compressing four phase clock signals into one compressed four phase clock signal comprising a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle; generating a four phase enable signal which contains two transitions in one cycle and is used to distinguish the first falling edge and the second falling edge; and delivering the one compressed four phase clock signal on a single clock signal line and the four phase enable signal on a single enable signal line to one or more receivers. ### Claim 28 A system for minimizing timing skew comprising: one or more clock pulse generators for generating a four phase clock signal; a single clock signal line coupled to the one or more clock pulse generators for receiving and delivering the four phase clock signal; one or more enable pulse generators for generating a four phase enable signal; a single enable signal line coupled to the one or more enable pulse generators for receiving and delivering the four phase enable signal; and a receiver coupled to the single clock signal line to receive the four phase clock signal and coupled to the single enable signal line to receive the four phase enable signal; wherein the receiver applies the four phase enable signal to distinguish the first rising edge from the second rising edge. ### Claim 29 (depends on 28) The system as claimed in claim 28 wherein the four phase clock signal comprises a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle. ### Claim 30 (depends on 29) The system as claimed in claim 29 wherein the first rising edge contains 0 degree information and the second rising edge contains 180 degree information. ### Claim 31 (depends on 29) The system as claimed in claim 29 wherein the first falling edge contains 90 degree information and the second falling edge contains 270 degree information. ### Claim 32 (depends on 29) The system as claimed in claim 29 wherein a latch is used to distinguish the first falling edge and the second falling edge. ### Claim 33 (depends on 28) The system as claimed in claim 28 wherein the four phase enable signal contains two transitions in one cycle. ### Claim 34 A system for minimizing timing skew comprising: one or more clock pulse generators for generating a four phase clock signal; one or more enable pulse generators for generating a four phase enable signal; a single clock signal line for carrying the four phase clock signal and a single enable signal line for carrying the four phase enable signal; a first driver for driving the four phase clock signal coupled to the single clock signal line; a second driver for driving the four phase enable signal coupled to the single enable signal line; and a receiver coupled to the single clock signal line to receive the four phase clock signal and coupled to the single enable signal line to receive the four phase enable signal; wherein the receiver applies the four phase enable signal to distinguish the first rising edge from the second rising edge. ### Claim 35 (depends on 34) The system as claimed in claim 34 wherein the four phase clock signal comprises a first rising edge, a second rising edge, a first falling edge and a second falling edge in one cycle. ### Claim 36 (depends on 35) The system as claimed in claim 35 wherein the first rising edge contains 0 degree information and the second rising edge contains 180 degree information. ### Claim 37 (depends on 35) The system as claimed in claim 35 wherein the first falling edge contains 90 degree information and the second falling edge contains 270 degree information. ### Claim 38 (depends on 35) The system as claimed in claim 35 wherein a latch is used to distinguish the first falling edge and the second falling edge. ### Claim 39 (depends on 34) The system as claimed in claim 34 wherein the four phase enable signal contains two transitions in one cycle.