# US 8,542,046 B2 · Apparatus, system, and method for voltage swing and duty cycle adjustment > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,046 B2 - Document ID: US8542046B2 - Status: Granted - Kind: B2 - Application number: 13/100,669 - Filed: 2011-05-04 - Published: 2012-11-08 - Granted: 2013-09-24 - Earliest claimed: 2011-05-04 - Assignees: Intel Corporation - Applicants: Eduard Roytman; Jian Xu; Rahul R. Shah; Kambiz R. Munshi; Ronald L. Bedard; Mahalingam Nagarajan - Inventors: Eduard Roytman; Jian Xu; Rahul R. Shah; Kambiz R. Munshi; Ronald L. Bedard; Mahalingam Nagarajan - Web page: https://patentgrep.com/patent/US8542046B2 ## CPC - H03K 5/086: {generated by feedback} - H03K 5/1565: {the output pulses having a constant duty cycle} - H03M 1/004: {Reconfigurable analogue/digital or digital/analogue converters (H03M1/02 takes precedence)} - H03M 1/126: {Multi-rate systems, i.e. adaptive to different fixed sampling rates} - H03M 1/50: with intermediate conversion to time interval (H03M1/64 takes precedence) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract Described herein are an apparatus, system, and method for compensating voltage swing and duty cycle of a signal on an input-output (I/O) pad of a processor by adjusting the voltage swing and duty cycle of the signal. The apparatus comprises a driver to transmit a signal on an I/O pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. Described herein is also an analog-to-digital (A2D) converter for measuring and/or calibrating various signal attributes including current, voltage, and time. ## Claims ### Claim 1 An apparatus comprising: a driver to transmit a signal on an input-output (I/O) pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. ### Claim 2 (depends on 1) The apparatus of claim 1 further comprises: a duty cycle corrector, coupled to the driver and the adjustment unit, to receive the duty cycle control signal for adjusting a duty cycle of a signal for transmission by the driver. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the signal transmitted by the driver to the I/O pad is a differential signal. ### Claim 4 (depends on 3) The apparatus of claim 3, wherein the adjustment unit comprises: a multiplexer to receive multiple signals including: a common mode voltage signal of the differential signal from the I/O pad transmitted by the driver, a reference voltage signal, and the differential signal from the I/O pad; a low-pass-filter to receive an output of the multiplexer and to generate a filtered signal; a comparator to receive the filtered signal and to generate an output signal; and a finite state machine to receive the comparator output signal and to generate the voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein the multiplexer is operable to select the common mode voltage signal and the reference voltage signal for generating the voltage swing control signal. ### Claim 6 (depends on 4) The apparatus of claim 4, wherein the multiplexer is operable to select the differential signal from the I/O pad for generating the duty cycle control signal. ### Claim 7 (depends on 4) The apparatus of claim 4, wherein the low pass filter is a differential low pass filter, and wherein the filtered signal is a differential filtered signal for input to the comparator. ### Claim 8 (depends on 4) The apparatus of claim 4, wherein the comparator is operable to cancel offset. ### Claim 9 (depends on 4) The apparatus of claim 4, wherein the finite state machine operates at a frequency less than the frequency of the signal on the I/O pad. ### Claim 10 (depends on 1) The apparatus of claim 1, wherein the driver receives the voltage swing control signal to adjust a bias level of a transistor in the driver to adjust the voltage swing of the signal transmitted by the driver. ### Claim 11 (depends on 4) The apparatus of claim 4 further comprises a bypass logic unit to bypass the low pass filter when the adjustment unit is configured to generate the voltage swing control signal. ### Claim 12 (depends on 1) The apparatus of claim 1, wherein the adjustment unit is operable to generate the voltage swing control signal for adjusting the voltage swing of the signal on the I/O pad prior to generating the duty cycle control signal for adjusting the duty cycle of the signal on the I/O pad. ### Claim 13 A method comprising: initiating voltage swing and duty cycle adjustment operation for every input-output (I/O) lane of a processor having multiple I/O pads by: transmitting a signal on an I/O pad of the I/O lane, wherein the signal on the I/O pad having a voltage swing and a duty cycle; receiving the signal from the I/O pad; and generating voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad. ### Claim 14 (depends on 13) The method of claim 13 further comprises: prior to initiating the voltage swing and duty cycle adjustment operation, initiating a compensation operation for all I/O lanes of the processor for process, voltage, and temperature variations in signals at the multiple I/O pads for all I/O lanes, the compensation operation to generate compensation codes; freezing the compensation codes; and initiating the voltage swing and duty cycle adjustment operation. ### Claim 15 (depends on 14) The method of claim 14 further comprises, in response to completing the voltage swing and duty cycle adjustment operation: unfreezing the compensation codes; and continuing the compensation operation for all I/O lanes in response to unfreezing the compensation codes. ### Claim 16 A system comprising: a memory; and a processor coupled to the memory, the processor comprising: a driver to transmit a signal on an input-output (I/O) pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. ### Claim 17 (depends on 16) The system of claim 16, wherein the processor further comprises: a duty cycle corrector, coupled to the driver and the adjustment unit, to receive the duty cycle control signal for adjusting a duty cycle of a signal for transmission by the driver. ### Claim 18 (depends on 16) The system of claim 16, wherein the signal transmitted by the driver to the I/O pad is a differential signal, and wherein the adjustment unit comprises: a multiplexer to receive multiple signals including: a common mode voltage signal of the differential signal from the I/O pad transmitted by the driver, a reference voltage signal, and the differential signal from the I/O pad; a low-pass-filter to receive an output of the multiplexer and to generate a filtered signal; a comparator to receive the filtered signal and to generate an output signal; and a finite state machine to receive the comparator output signal and to generate the voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. ### Claim 19 (depends on 18) The system of claim 18, wherein the multiplexer is operable to select the common mode voltage signal and the reference voltage signal for generating the voltage swing control signal, and wherein the multiplexer is operable to select the differential signal from the I/O pad for generating the duty cycle control signal. ### Claim 20 (depends on 18) The system of claim 18, wherein the finite state machine operates at a frequency less than the frequency of the signal on the I/O pad. ### Claim 21 (depends on 18) The system of claim 18, wherein the driver receives the voltage swing control signal to adjust a bias level of a transistor in the driver to adjust the voltage swing of the signal transmitted by the driver. ### Claim 22 (depends on 18) The system of claim 18 further comprises a bypass logic unit to bypass the low pass filter when the adjustment unit is configured to generate the voltage swing control signal. ### Claim 23 (depends on 16) The system of claim 16, wherein the adjustment unit is operable to generate the voltage swing control signal for adjusting the voltage swing of the signal on the I/O pad prior to generating the duty cycle control signal for adjusting the duty cycle of the signal on the I/O pad.