# US 8,542,038 B2 · Source driver and receiver thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,038 B2 - Document ID: US8542038B2 - Status: Granted - Kind: B2 - Application number: 13/441,211 - Filed: 2012-04-06 - Published: 2012-10-11 - Granted: 2013-09-24 - Earliest claimed: 2011-04-08 - Assignees: Raydium Semiconductor Corporation - Applicants: Ren-Feng Huang; Hui-Wen Miao; Ko-Yang Tso - Inventors: Ren-Feng Huang; Hui-Wen Miao; Ko-Yang Tso - Web page: https://patentgrep.com/patent/US8542038B2 ## CPC - G09G 3/3685: {Details of drivers for data electrodes} - G09G 2330/021: Power management, e.g. power saving - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A source driver and a receiver thereof are disclosed. A two-stage amplifier of the receiver includes a first-stage circuit and a second-stage circuit. The second-stage circuit includes a first switch, a second switch, a third switch, a first node, and a second node. The first switch is coupled between the first node and a ground end; the second switch is coupled between the second node and the ground end; the third switch is coupled between the first node and the second node. When the receiver wants to wake up from a power-saving mode to a normal operation mode, the first switch and the second switch are switched to the off-state according to a control signal at first; after a period of delay time, the third switch is also switched to the off-state according to a delayed control signal. ## Claims ### Claim 1 A source driver, comprising: a receiver, comprising: a two-stage amplifier, comprising: a first-stage circuit; and a second-stage circuit, coupled to the first-stage circuit, the second-stage circuit comprising a first switch, a second switch, a third switch, a first node, and a second node; the first switch being coupled between the first node and a ground end; the second switch being coupled between the second node and the ground end; the third switch being coupled between the first node and the second node; wherein when the receiver wants to wake up from a power-saving mode to a normal operation mode, the first switch and the second switch are switched to the off-state according to a control signal at first; after a period of delay time, the third switch is also switched to the off-state according to a delayed control signal. ### Claim 2 (depends on 1) The source driver of claim 1, wherein the receiver further comprises a current input end, a first voltage input end, and a second voltage input end, the first-stage circuit comprises a first transistor, a second transistor, and a third transistor, the third transistor is coupled among the current input end, the first transistor, and the second transistor, the first transistor is coupled to the first voltage input end, and the second transistor is coupled to the second voltage input end. ### Claim 3 (depends on 2) The source driver of claim 2, wherein when the receiver enters into the power-saving mode from the normal operation mode, the third transistor cuts off the current inputted from the current input end according to the control signal. ### Claim 4 (depends on 1) The source driver of claim 1, wherein the second-stage circuit further comprises a fourth transistor and a fifth transistor, the fourth transistor is coupled between the first node and the ground end, the fifth transistor is coupled between the second node and the ground end, during the period of delay time, the first switch and the second switch are switched to the off-state, and the third switch is still under the on-state to maintain the short state between the first node and the second node. ### Claim 5 (depends on 1) The source driver of claim 1, wherein the receiver further comprises: a voltage output end; and a buffer, coupled between the second-stage circuit and the voltage output end, for receiving an amplified voltage signal from the second-stage circuit, converting the amplified voltage signal into an output voltage signal, and transmitting the output voltage signal to the voltage output end. ### Claim 6 A receiver, applied in a source driver, the receiver comprising: a two-stage amplifier, comprising: a first-stage circuit; and a second-stage circuit, coupled to the first-stage circuit, the second-stage circuit comprising a first switch, a second switch, a third switch, a first node, and a second node; the first switch being coupled between the first node and a ground end; the second switch being coupled between the second node and the ground end; the third switch being coupled between the first node and the second node; wherein when the receiver wants to wake up from a power-saving mode to a normal operation mode, the first switch and the second switch are switched to the off-state according to a control signal at first; after a period of delay time, the third switch is also switched to the off-state according to a delayed control signal. ### Claim 7 (depends on 6) The receiver of claim 6, further comprising a current input end, a first voltage input end, and a second voltage input end, wherein the first-stage circuit comprises a first transistor, a second transistor, and a third transistor, the third transistor is coupled among the current input end, the first transistor, and the second transistor, the first transistor is coupled to the first voltage input end, and the second transistor is coupled to the second voltage input end. ### Claim 8 (depends on 7) The receiver of claim 7, wherein when the receiver enters into the power-saving mode from the normal operation mode, the third transistor cuts off the current inputted from the current input end according to the control signal. ### Claim 9 (depends on 6) The receiver of claim 6, wherein the second-stage circuit further comprises a fourth transistor and a fifth transistor, the fourth transistor is coupled between the first node and the ground end, the fifth transistor is coupled between the second node and the ground end, during the period of delay time, the first switch and the second switch are switched to the off-state, and the third switch is still under the on-state to maintain the short state between the first node and the second node. ### Claim 10 (depends on 6) The receiver of claim 6, further comprising: a voltage output end; and a buffer, coupled between the second-stage circuit and the voltage output end, for receiving an amplified voltage signal from the second-stage circuit, converting the amplified voltage signal into an output voltage signal, and transmitting the output voltage signal to the voltage output end.