# US 8,542,004 B2 · Semiconductor device and driving method of the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,542,004 B2 - Document ID: US8542004B2 - Status: Granted - Kind: B2 - Application number: 13/683,863 - Filed: 2012-11-21 - Published: 2013-03-28 - Granted: 2013-09-24 - Earliest claimed: 2010-02-12 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co. Ltd. - Inventors: Hiroki Inoue; Kiyoshi Kato; Takanori Matsuzaki; Shuhei Nagatsuka - Web page: https://patentgrep.com/patent/US8542004B2 ## CPC - G11C 11/24: using capacitors (G11C11/22 takes precedence; using a combination of semiconductor devices and capacitors G11C11/34, e.g. G11C11/40) - G11C 11/403: with charge regeneration common to a multiplicity of memory cells, i.e. external refresh - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - G11C 11/405: with three charge-transfer gates, e.g. MOS transistors, per cell - H10B 41/30: characterised by the memory core region - G11C: STATIC STORES (semiconductor memory devices H10B) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10B: ELECTRONIC MEMORY DEVICES ## Abstract An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and the number of times of writing is not limited. The semiconductor device is formed using a wide gap semiconductor and includes a potential change circuit which selectively applies a potential either equal to or different from a potential of a bit line to a source line. Thus, power consumption of the semiconductor device can be sufficiently reduced. ## Claims ### Claim 1 A semiconductor device comprising: first to fifth lines; a first multiplexer; a second multiplexer; and a memory cell, the memory cell comprising: a first transistor comprising a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region including a first semiconductor; a second transistor comprising a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region including a second semiconductor; and a capacitor, wherein the first gate electrode, the second drain electrode, and one of electrodes of the capacitor are electrically connected to each other, wherein the first line, the second source electrode, the first drain electrode, and a first terminal of the first multiplexer are electrically connected to each other, wherein the second line, the first source electrode, and a first terminal of the second multiplexer are electrically connected to each other, wherein the third line is electrically connected to a second terminal of the first multiplexer and a second terminal of the second multiplexer, wherein the forth line is electrically connected to a third terminal of the first multiplexer, and wherein the fifth line is electrically connected to a third terminal of the second multiplexer. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first semiconductor is different from the second semiconductor. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the second semiconductor is an oxide semiconductor. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, further comprising: a write and read control signal line, wherein the write and read control signal line is electrically connected to the first multiplexer and the second multiplexer. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the first gate electrode, the second drain electrode, and the one of electrodes of the capacitor are electrically connected to each other to form a node which holds charge. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, further comprising: a sixth line; and a seventh line, wherein the sixth line and the other of the electrodes of the capacitor are electrically connected to each other, wherein the seventh line and the second gate electrode are electrically connected to each other. ### Claim 7 A semiconductor device comprising: first to fifth lines; a potential change circuit; and a memory cell, the memory cell comprising: a first transistor comprising a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region including a first semiconductor; a second transistor comprising a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region including a second semiconductor; and a capacitor, wherein the first gate electrode, the second drain electrode, and one of electrodes of the capacitor are electrically connected to each other, wherein the first line, the second source electrode, and the first drain electrode are electrically connected to each other, wherein the second line and the first source electrode are electrically connected to each other, wherein the potential change circuit is configured to select a first connection or a second connection, wherein the first line and the second line are electrically connected to the third line when the first connection is selected, and wherein the first line is electrically connected to the fourth line and the second line is electrically connected to the fifth line when the second connection is selected. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein the first semiconductor is different from the second semiconductor. ### Claim 9 (depends on 7) The semiconductor device according to claim 7, wherein the second semiconductor is an oxide semiconductor. ### Claim 10 (depends on 7) The semiconductor device according to claim 7, further comprising: a write and read control signal line, wherein the write and read control signal line is electrically connected to the potential change circuit. ### Claim 11 (depends on 7) The semiconductor device according to claim 7, wherein the first gate electrode, the second drain electrode, and the one of electrodes of the capacitor are electrically connected to each other to form a node which holds charge. ### Claim 12 (depends on 7) The semiconductor device according to claim 7, further comprising: a sixth line; and a seventh line, wherein the sixth line and the other of the electrodes of the capacitor are electrically connected to each other, wherein the seventh line and the second gate electrode are electrically connected to each other. ### Claim 13 A semiconductor device comprising: a bit line; a first source line; an input signal line; a read circuit input signal line; a second source line; a potential change circuit; and a memory cell, the memory cell comprising: a first transistor comprising a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region including a first semiconductor; a second transistor comprising a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region including a second semiconductor; and a capacitor, wherein the first gate electrode, the second drain electrode, and one of electrodes of the capacitor are electrically connected to each other, wherein the bit line, the second source electrode, and the first drain electrode are electrically connected to each other, wherein the first source line and the first source electrode are electrically connected to each other, wherein the potential change circuit is configured to select a first connection or a second connection, wherein the bit line and the first source line are electrically connected to the input signal line when the first connection is selected, and wherein the bit line is electrically connected to the read circuit input signal line and the first source line is electrically connected to the second source line when the second connection is selected. ### Claim 14 (depends on 13) The semiconductor device according to claim 13, wherein the first semiconductor is different from the second semiconductor. ### Claim 15 (depends on 13) The semiconductor device according to claim 13, wherein the second semiconductor is an oxide semiconductor. ### Claim 16 (depends on 13) The semiconductor device according to claim 13, further comprising: a write and read control signal line, wherein the write and read control signal line is electrically connected to the potential change circuit. ### Claim 17 (depends on 13) The semiconductor device according to claim 13, wherein the first gate electrode, the second drain electrode, and the one of electrodes of the capacitor are electrically connected to each other to form a node which holds charge. ### Claim 18 (depends on 13) The semiconductor device according to claim 13, further comprising: a read word line; and a write word line, wherein the read word line and the other of the electrodes of the capacitor are electrically connected to each other, wherein the write word line and the second gate electrode are electrically connected to each other.