# US 8,541,990 B2 · Power conversion controller having a novel power factor correction mechanism using line voltage normalization

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- Number: US 8,541,990 B2
- Document ID: US8541990B2
- Status: Granted
- Kind: B2
- Application number: 12/953,219
- Filed: 2010-11-23
- Published: 2012-05-24
- Granted: 2013-09-24
- Earliest claimed: 2010-11-23
- Assignees: Immense Advance Technology Corp.
- Applicants: Ko-Yen Lee; Chia-Chieh Hung; Wei-Chuan Su
- Inventors: Ko-Yen Lee; Chia-Chieh Hung; Wei-Chuan Su
- Web page: https://patentgrep.com/patent/US8541990B2

## CPC

- H02M 1/4225: {using a non-isolated boost converter}
- H05B 45/3725: Switched mode power supply [SMPS]
- H05B 45/375: using buck topology
- H05B 45/38: using boost topology
- H05B 45/385: using flyback topology
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H05B: ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

A power conversion controller having a novel power factor correction mechanism, including: a normalization unit, used to generate a normalized signal according to a line voltage by multiplying the line voltage with a normalizing gain, wherein the normalizing gain is proportional to the reciprocal of the amplitude of the line voltage; a reference current generation unit, coupled to the normalization unit to generate a reference current signal by performing an arithmetic operation, wherein the arithmetic operation involves the normalized signal; and a gate drive signal generation unit, used to generate a gate drive signal, wherein the duty of the gate drive signal is determined by a voltage comparison of the reference current signal and a current sensing signal.

## Claims

### Claim 1

A power conversion controller having a novel power factor correction mechanism, comprising:
a normalization unit, using an auto gain control mechanism to generate a normalized signal and a normalizing gain according to a line voltage, wherein said normalized signal is equal to a product of said line voltage and said normalizing gain, and said normalizing gain is proportional to a reciprocal of an amplitude of said line voltage,
a reference current generation unit, coupled to said normalization unit to generate a reference current signal by performing an arithmetic operation, wherein said arithmetic operation involves said normalized signal wherein said reference current generation unit implements selecting said arithmetic operation from a group that includes both SREFC=VNORM×SG and SREFC=VNORM, wherein SREFC represents said reference current signal, VNORM represents said normalized signal, and SG represents said normalizing gain; and
a gate drive signal generation unit, used to generate a gate drive signal, wherein a duty of said gate drive signal is determined by a voltage comparison of said reference current signal and a current sensing signal.

### Claim 2 (depends on 1)

The power conversion controller having a novel power factor correction mechanism as claim 1, wherein the group also includes the arithmetic operation SREFC=VNORM×VNORM.

### Claim 3 (depends on 1)

The power conversion controller having a novel power factor correction mechanism as claim 1, wherein the group also includes the arithmetic operation SREFC=VNORM×(VNORM+VO×SG), wherein VO represents an output voltage.

### Claim 4 (depends on 1)

The power conversion controller having a novel power factor correction mechanism as claim 1, wherein the group also includes the arithmetic operation SREFC=VNORM×(VO×SG), wherein VO represents an output voltage.