# US 8,541,892 B2 · Bonding connection between a bonding wire and a power semiconductor chip > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,541,892 B2 - Document ID: US8541892B2 - Status: Granted - Kind: B2 - Application number: 12/888,781 - Filed: 2010-09-23 - Published: 2011-05-26 - Granted: 2013-09-24 - Earliest claimed: 2010-09-23 - Assignees: Infineon Technologies AG - Applicants: Dirk Siepe; Thomas Gutt; Roman Roth - Inventors: Dirk Siepe; Thomas Gutt; Roman Roth - Web page: https://patentgrep.com/patent/US8541892B2 ## CPC - H10W 72/075: {of bond wires} - H10W 72/07555: {changes in materials} - H10W 72/5363: {the connected ends being wedge-shaped} - H10W 72/551: {Materials of bond wires} - H10W 72/5524: {comprising aluminium [Al]} - H10W 72/59: Bond pads specially adapted therefor - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/934: {Cross-sectional shape, i.e. in side view} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A bonding connection between a bonding wire and a power semiconductor chip is disclosed. The power semiconductor chip has a semiconductor body arranged in which is an active cell region with a multiplicity of cells arranged one following the other in a lateral direction and connected electrically in parallel. The semiconductor body has a surface portion arranged above the active cell region in a vertical direction perpendicular to the lateral direction. Applied to the surface portion is a metallization layer onto which a bonding wire is bonded. The bonding wire comprises an alloy containing at least 99% by weight aluminum and at least one further alloying constituent. The aluminum has a grain structure with a mean grain size which is less than 2 μm. ## Claims ### Claim 1 A power semiconductor arrangement comprising a bonding connection between a bonding wire and a power semiconductor chip, the power semiconductor chip including a semiconductor body arranged in which is an active cell region with a multiplicity of cells arranged one following the other in a lateral direction and connected electrically in parallel, wherein: the semiconductor body has a surface portion arranged above the active cell region in a vertical direction perpendicular to the lateral direction; applied to the surface portion is a metallization layer onto which a bonding wire is bonded; the bonding wire comprises an alloy containing at least 99% by weight aluminum and at least one further alloying constituent; and the aluminum has a grain structure with a mean grain size less than 2 μm. ### Claim 2 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the metallization layer has a first sub-layer and a second sub-layer arranged between the first sub-layer and the active cell region on the surface portion. ### Claim 3 (depends on 2) The power semiconductor arrangement as claimed in claim 2, wherein the first sub-layer directly contacts the second sub-layer. ### Claim 4 (depends on 2) The power semiconductor arrangement as claimed in claim 2, wherein the first sub-layer has a hardness greater than a hardness of the bonding wire. ### Claim 5 (depends on 4) The power semiconductor arrangement as claimed in claim 4, wherein the first sub-layer comprises at least one of the following materials, or an alloy with one or more of the following materials: Ni, NiB, NiP, CoWB, NiWP, NiWB, NiMoP, NiMoB, NiCoP, NiCoB, NiPd, Cu and a Cu alloy. ### Claim 6 (depends on 2) The power semiconductor arrangement as claimed in claim 2, wherein the second sub-layer comprises aluminum having 0.2% by weight to 5.0% by weight silicon precipitates. ### Claim 7 (depends on 2) The power semiconductor arrangement as claimed in claim 2, wherein the first sub-layer comprises Al, AlCu, AlTi or an alloy with at least one of Al, AlCu, and AlTi and is free from silicon precipitates. ### Claim 8 (depends on 2) The power semiconductor arrangement as claimed in claim 2, wherein the second sub-layer is formed as a barrier layer. ### Claim 9 (depends on 8) The power semiconductor arrangement as claimed in claim 8, wherein a thickness of the second sub-layer is such that an activation energy associated with a diffusion of particles of the first sub-layer through the second sub-layer is at least 0.9 eV. ### Claim 10 (depends on 9) The power semiconductor arrangement as claimed in claim 9, wherein the thickness of the second sub-layer is such that an activation energy associated with a diffusion of copper and/or aluminum through the second sub-layer is at least 0.9 eV. ### Claim 11 (depends on 8) The power semiconductor arrangement as claimed in claim 8, wherein the second sub-layer comprises one of the following materials or of an alloy with one of the following materials: TiN, Ta, TaN, TiW and W. ### Claim 12 (depends on 11) The power semiconductor arrangement as claimed in claim 11, wherein the bonding wire is formed from one of the following materials: AlMg, AlSl, AlTi, AlCu, AlSiCu and AlMgPd. ### Claim 13 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the at least one further alloying constituent comprises one or more of the following substances: Mg, Si, Ti, Cu, Si and Pd. ### Claim 14 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the bonding wire directly contacts the first sub-layer. ### Claim 15 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the metallization layer comprises a third sub-layer arranged between the bonding wire and the first sub-layer in the vertical direction. ### Claim 16 (depends on 15) The power semiconductor arrangement as claimed in claim 15, wherein the bonding wire directly contacts the third sub-layer. ### Claim 17 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the bonding wire has a diameter of more than 100 μm. ### Claim 18 (depends on 17) The power semiconductor arrangement as claimed in claim 17, wherein the bonding wire has a diameter of greater than or equal to 300 μm. ### Claim 19 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the bonding wire is unsealed. ### Claim 20 (depends on 1) The power semiconductor arrangement as claimed in claim 1, wherein the power semiconductor chip is a MOSFET or an IGBT, and in which the cells are cells of a MOSFET or of an IGBT.