# US 8,541,891 B2 · Semiconductor device

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- Number: US 8,541,891 B2
- Document ID: US8541891B2
- Status: Granted
- Kind: B2
- Application number: 12/073,849
- Filed: 2008-03-11
- Published: 2008-10-02
- Granted: 2013-09-24
- Earliest claimed: 2007-03-30
- Assignees: Lapis Semiconductor Co., Ltd.
- Applicants: Yoshihiro Saeki
- Inventors: Yoshihiro Saeki
- Web page: https://patentgrep.com/patent/US8541891B2

## CPC

- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 72/30: Die-attach connectors
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/00: Package configurations
- H10W 72/01308: {using permanent auxiliary members, e.g. using alignment marks}
- H10W 72/072: {of bump connectors}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07311: {Treating the bonding area before connecting, e.g. by applying flux or cleaning}
- H10W 72/075: {of bond wires}
- H10W 72/387: {Flow barriers}
- H10W 72/856: {Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15)}
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/931: {Shapes of bond pads}
- H10W 72/932: {Plan-view shape, i.e. in top view}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device having a first rectangular chip on which wires, electrode pads and chip mounting area are provided, a first dame formed on the first rectangular chip around the electrode pads and the chip mounting area so as to cover the wires and an under fill formed by filling liquid resin between a second rectangular chip mounted on the chip mounting area in a flip-chip manner and the first rectangular chip.

## Claims

### Claim 1

A semiconductor device, comprising:
a first substantially rectangular chip having a top surface on which wires, electrode pads and a chip mounting area are provided;
a first dam formed on the top surface of the first substantially rectangular chip around the electrode pads and the chip mounting area so as to cover the wires;
a second substantially rectangular chip mounted on the chip mounting area in a flip-chip manner, the second substantially rectangular chip having first and second sides that are substantially perpendicular to each other in a plan view;
an under fill formed by filling liquid resin into a space between a top surface of the second substantially rectangular chip and the top surface of the first substantially rectangular chip;
a second dam formed on the top surface of the first substantially rectangular chip, between the first dam and the first side of the second substantially rectangular chip, and extending along the first side; and
a third dam formed on the top surface of the first substantially rectangular chip, between the first dam and the second side of the second substantially rectangular chip, and extending along the second side, wherein
the first dam protects the wires and keeps the wires isolated from the liquid resin.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, further comprising at least one chamfered portion at one corner of an inner peripheral portion of the first dam.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2, wherein there is provided a region having a distance between the first side of the second substantially rectangular chip and the first dam which is longer than a distance between the second side of the second substantially rectangular chip and the first dam.

### Claim 4 (depends on 2)

The semiconductor device according to claim 2, wherein a length of the second dam is 35% to 48% of the first side of the second substantially rectangular chip, and a width of the second dam is 2% to 24% of the distance between the first side of the second substantially rectangular chip and the first dam.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein there is provided a region having a distance between the first side of the second substantially rectangular chip and the first dam which is longer than a distance between the second side of the second substantially rectangular chip and the first dam.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein a length of the second dam is 35% to 48% of the first side of the second substantially rectangular chip, and a width of the second dam is 2% to 24% of the distance between the first side of the second substantially rectangular chip and the first dam.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, wherein a length of the third dam is 80% to 120% of the length of the second side of the second substantially rectangular chip and a width of the third dam is 8% to 33% of the length from the second side of the second substantially rectangular chip to the first dam.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, further comprising a fourth dam formed so as to protrude from at least one of the side faces of an inner peripheral portion of the first dam to the second substantially rectangular chip.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, further comprising a plurality of second substantially rectangular chips on the same plane of the chip mounting area, wherein a distance between the neighboring second substantially rectangular chips is greater than a distance between the second substantially rectangular chip and the first dam.

### Claim 10

A semiconductor device, comprising:
a first substantially rectangular chip having a top surface on which wires, electrode pads and a chip mounting area are provided;
a first dam formed on the top surface of the first substantially rectangular chip around the electrode pads and the chip mounting area, the wires being beneath the first dam and being covered by the first dam;
a second substantially rectangular chip mounted on the chip mounting area in a flip-chip manner, the second substantially rectangular chip having first and second sides that are substantially perpendicular to each other in a plan view;
an under fill formed by filling liquid resin into a space between a top surface of the second substantially rectangular chip and the top surface of the first substantially rectangular chip,
a second dam formed on the top surface of the first substantially rectangular chip, between the first dam and the first side of the second substantially rectangular chip, and extending along the first side; and
a third dam formed on the top surface of the first substantially rectangular chip, between the first dam and the second side of the second substantially rectangular chip, and extending along the second side.

### Claim 11 (depends on 10)

The semiconductor device according to claim 10, further comprising at least one chamfered portion at one corner of an inner peripheral portion of the first dam.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11, wherein there is provided a region having a distance between the first side of the second substantially rectangular chip and the first dam which is longer than a distance between the second side of the second substantially rectangular chip and the first dam.

### Claim 13 (depends on 11)

The semiconductor device according to claim 11, wherein a length of the second dam is 35% to 48% of the first side of the second substantially rectangular chip, and a width of the second dam is 2% to 24% of the distance between the first side of the second substantially rectangular chip and the first dam.

### Claim 14 (depends on 10)

The semiconductor device according to claim 10, wherein there is provided a region having a distance between the first side of the second substantially rectangular chip and the first dam which is longer than a distance between the second side of the second substantially rectangular chip and the first dam.

### Claim 15 (depends on 10)

The semiconductor device according to claim 10, wherein a length of the second dam is 35% to 48% of the first side of the second substantially rectangular chip, and a width of the second dam is 2% to 24% of the distance between the first side of the second substantially rectangular chip and the first dam.

### Claim 16 (depends on 10)

The semiconductor device according to claim 10, wherein a length of the third dam is 80% to 120% of the length of the second side of the second substantially rectangular chip and a width of the third dam is 8% to 33% of the length from the second side of the second substantially rectangular chip to the first dam.

### Claim 17 (depends on 10)

The semiconductor device according to claim 10, further comprising a fourth dam formed so as to protrude from at least one of the side faces of an inner peripheral portion of the first dam to the second substantially rectangular chip.

### Claim 18 (depends on 10)

The semiconductor device according to claim 10, further comprising a plurality of second substantially rectangular chips on the same plane of the chip mounting area, wherein a distance between the neighboring second substantially rectangular chips is greater than a distance between the second substantially rectangular chip and the first dam.
