# US 8,541,888 B2 · Pad layout structure of a driver IC chip > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,541,888 B2 - Document ID: US8541888B2 - Status: Granted - Kind: B2 - Application number: 12/997,206 - Filed: 2009-05-22 - Published: 2011-04-21 - Granted: 2013-09-24 - Earliest claimed: 2008-06-16 - Assignees: Silicon Works Co., Ltd. - Applicants: Joung Cheul Choi; An Young Kim; Joon Ho Na; Dae Seong Kim; Dae Keun Han - Inventors: Joung Cheul Choi; An Young Kim; Joon Ho Na; Dae Seong Kim; Dae Keun Han - Web page: https://patentgrep.com/patent/US8541888B2 ## CPC - G02F 1/1345: Conductors connecting electrodes to cell terminals - H10W 70/65: Shapes or dispositions of interconnections - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A pad layout structure of a driver IC chip to be mounted to a liquid crystal display panel. The pad layout structure includes power pad sections placed at respective four corners of the driver IC chip and each having a first power pad for supplying first power to the driver IC chip, a second power pad for supplying second power to the driver IC chip, a third power pad for supplying third power to the driver IC chip and a fourth power pad for supplying fourth power to the driver IC chip. ## Claims ### Claim 1 A driver IC chip mounted to a liquid crystal display panel included in a liquid crystal display, wherein the liquid crystal display also comprises a power supply and a timing controller, the driver IC chip comprising: first, second, third, and fourth power pad sections placed at respective four corners of upper and lower side edges of the driver IC chip, wherein each of the first, second, third, and fourth power pad sections comprises a first power pad configured to supply first power to the driver IC chip from the power supply, a second power pad configured to supply second power to the driver IC chip from the power supply, a third power pad configured to supply third power to the driver IC chip from the power supply, and a fourth power pad configured to supply fourth power to the driver IC chip from the power supply, wherein each of the first, second, third, and fourth power pads is connected to the power supply via one or more power supply lines; an input pad section comprising one or more input pads, wherein the one or more input pads are connected to the timing controller via one or more signal lines, wherein the one or more input pads are configured to receive one or more control signals from the timing controller via the one or more signal lines, and wherein the input pad section is placed on the upper side edge of the driver IC chip between the first power pad section and the second power pad section; and an output pad section comprising one or more output pads, wherein the one or more output pads are connected to the liquid crystal display panel via one or more connection lines, wherein the one or more output pads are configured to output one or more signals to the liquid crystal display panel via the one or more connection lines, and wherein the output pad section is placed on the lower side edge of the driver IC chip between the third power pad section and the fourth power pad section, wherein an additional power pad section is placed in at least one of left or right end portions of the driver IC chip, and wherein the upper and lower side edges are longer than the left and right end portions, wherein the first corner of the driver IC chip is positioned at the left end portion of the upper side edge, wherein the second corner of the driver IC chip is positioned at the right end portion of the upper side edge, wherein the third corner of the driver IC chip is positioned at the left end portion of the lower side edge, and wherein the fourth corner of the driver IC chip is positioned at the right end portion of the lower side edge. ### Claim 2 (depends on 1) The driver IC chip according to claim 1, wherein each of the first, second, third, and fourth power pad sections placed at the four corners of the driver IC chip is connected with either the left side power pad section or the right side power pad section. ### Claim 3 (depends on 2) The driver IC chip according to claim 2, wherein the first power pad and the second power pad of the second power pad section and the first power pad and the second power pad of the right side power pad section are connected with each other via a first power pad connection line and a second power pad connection line. ### Claim 4 (depends on 3) The driver IC chip according to claim 3, wherein the third power pad and the fourth power pad of the fourth power pad section and the third power pad and the fourth power pad of the right side power pad section are connected with each other via a third power pad connection line and a fourth power pad connection line. ### Claim 5 (depends on 4) The driver IC chip according to claim 4, wherein the first power pad connection line, the second power pad connection line, the third power pad connection line, and the fourth power pad connection line are connected by bypassing the driver IC chip. ### Claim 6 (depends on 5) The driver IC chip according to claim 5, wherein the first power pad connection line, the second power pad connection line, the third power pad connection line, and the fourth power pad connection line are connected in a line-on-glass (LOG) type. ### Claim 7 (depends on 1) The driver IC chip according to claim 1, wherein the first power is supply power for digital signal processing, and the second power is ground power for digital signal processing. ### Claim 8 (depends on 1) The driver IC chip according to claim 1, wherein the third power is supply power for analog signal processing, and the fourth power is ground power for analog signal processing. ### Claim 9 (depends on 1) The driver IC chip according to claim 1, wherein the driver IC chip is mounted to the liquid crystal display panel in a chip-on-glass (COG) type. ### Claim 10 (depends on 4) The driver IC chip according to claim 4, wherein the first power is supply power for digital signal processing, and the second power is ground power for digital signal processing. ### Claim 11 (depends on 10) The driver IC chip according to claim 10, wherein the third power is supply power for analog signal processing, and the fourth power is ground power for analog signal processing. ### Claim 12 (depends on 4) The driver IC chip according to claim 4, wherein the driver IC chip is mounted to the liquid crystal display panel in a chip-on-glass (COG) type. ### Claim 13 (depends on 5) The driver IC chip according to claim 5, wherein the first power is supply power for digital signal processing, and the second power is ground power for digital signal processing. ### Claim 14 (depends on 13) The driver IC chip according to claim 13, wherein the third power is supply power for analog signal processing, and the fourth power is ground power for analog signal processing. ### Claim 15 (depends on 5) The driver IC chip according to claim 5, wherein the driver IC chip is mounted to the liquid crystal display panel in a chip-on-glass (COG) type. ### Claim 16 (depends on 6) The driver IC chip according to claim 6, wherein the first power is supply power for digital signal processing, and the second power is ground power for digital signal processing. ### Claim 17 (depends on 16) The driver IC chip according to claim 16, wherein the third power is supply power for analog signal processing, and the fourth power is ground power for analog signal processing. ### Claim 18 (depends on 6) The driver IC chip according to claim 6, wherein the driver IC chip is mounted to the liquid crystal display panel in a chip-on-glass (COG) type. ### Claim 19 (depends on 1) The driver IC chip according to claim 1, further comprising: a left side power pad section placed at the left end portion of the driver IC chip between the first power pad section and the third power pad section, wherein the left side power pad section comprises first, second, third, and fourth power pads each configured to supply power to the driver IC chip from the power supply; and a right side power pad section placed at the right end portion of the driver IC chip between the second power pad section and the fourth power pad section, wherein the right side power pad section comprises first, second, third, and fourth power pads each configured to supply power to the driver IC chip from the power supply.