# US 8,541,865 B2 · Semiconductor device with improved ESD protection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,541,865 B2 - Document ID: US8541865B2 - Status: Granted - Kind: B2 - Application number: 12/739,333 - Filed: 2008-10-22 - Published: 2011-05-26 - Granted: 2013-09-24 - Earliest claimed: 2007-10-25 - Assignees: NXP B.V. - Applicants: Jean-Marc Yannou; Johannes Van Zwol; Emmanuel Savin - Inventors: Jean-Marc Yannou; Johannes Van Zwol; Emmanuel Savin - Web page: https://patentgrep.com/patent/US8541865B2 ## CPC - H10W 42/60: protecting against electrostatic charges or discharges, e.g. Faraday shields (integrated devices comprising arrangements for electrical protection H10D89/60) - H10D 84/221: {of only diodes} - H10D 89/611: {using diodes as protective elements} - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10W 70/65: Shapes or dispositions of interconnections - H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/29: Bond pads specially adapted therefor - H10W 72/922: {Bond pads being integral with underlying chip-level interconnections} - H10W 90/00: Package configurations - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract The present invention relates to a semiconductor device, comprising a semiconductor substrate (102) with a thickness of less than 100 micrometer and with a first substrate side and an opposite second substrate side. A plurality of at least four monolithically integrated Zener or avalanche diodes (164,166,168,170) with a reverse breakdown voltage of less than 20 V are defined in the semiconductor substrate and connected with each other in a series connection. The diodes are defined in a plurality of mutually isolated substrate islands (120,122,124,126) in the semiconductor substrate, at least one diode per substrate island. The substrate islands are laterally surrounded by through-substrate isolations extending from the first to the second substrate side and comprising a filling (128) that electrically isolates a respective substrate island from a respective laterally surrounding area of the semiconductor substrate. ## Claims ### Claim 1 An semiconductor device, comprising: a semiconductor substrate with a thickness of less than about 100 micrometers and with a first substrate side and an opposite second substrate side; a plurality of monolithically integrated Zener or avalanche diodes with a reverse breakdown voltage of less than about 20 V, which are defined in the semiconductor substrate and which are connected with each other in a series connection, wherein the diodes are defined in a plurality of mutually isolated substrate islands in the semiconductor substrate, at least one diode per substrate island, and wherein the substrate islands are laterally surrounded by through-substrate isolations extending from the first to the second substrate side and comprising a filling that electrically isolates a respective substrate island from a respective laterally surrounding area of the semiconductor substrate, wherein a first metallization is provided on the first substrate side, and a second metallization is provided on the second substrate side, and wherein the through-substrate isolations comprise an electrically conductive via, which is electrically isolated from the semiconductor substrate by an insulation layer and which provides an electrical pathway between the first and second substrate sides, wherein the substrate islands have a first conductivity type, and the diodes, to form their respective pn junction, comprise a substrate region of an opposite second conductivity type laterally embedded in the substrate island on one substrate side, and wherein diodes in different substrate islands are connected through the first or second metallization and the via. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the series connection of diodes comprises at least two diodes connected with each other in a back-to-back configuration. ### Claim 3 (depends on 2) The semiconductor device of claim 2, wherein the series connection comprises at least two pairs of serially connected diodes, and wherein the diodes of each pair are connected back-to-front, and wherein the two pairs are connected back-to-back. ### Claim 4 (depends on 2) The semiconductor device of claim 2, wherein two diodes in a respective back-to-back configuration of the series connection of diodes are defined on one respective substrate island. ### Claim 5 (depends on 1) The semiconductor device of claim 1, wherein the substrate has a thickness of less than about 50 micrometer. ### Claim 6 (depends on 1) The semiconductor device of claim 1, wherein the series connection of diodes comprises at least four diodes, the number of diodes being chosen such that a sum of reverse breakdown voltages of the diodes exceeds an application-specific threshold voltage. ### Claim 7 (depends on 1) The semiconductor device of claim 1, wherein neighboring diodes of the series connection have a lateral distance of between about 50 and about 150 μm. ### Claim 8 (depends on 1) The semiconductor device of claim 1, further comprising at least one capacitor or inductor on the semiconductor substrate. ### Claim 9 (depends on 1) A semiconductor assembly comprising a semiconductor device according to claim 1 and a second device. ### Claim 10 (depends on 8) The assembly of claim 8, wherein the second chip comprises an integrated circuit that forms a transceiver according to a Control Access Network standard. ### Claim 11 A method for fabricating a semiconductor device, comprising providing a semiconductor substrate with a first and an opposite second substrate side; defining a plurality of diodes in the semiconductor substrate on the first substrate side; defining a plurality of substrate islands in the semiconductor substrate laterally surrounded by the trenches, with at least one diode per substrate island; fabricating a filling in the trenches that electrically isolates a respective substrate island from a respective laterally surrounding area of the semiconductor substrate; thinning the substrate from the second substrate side such that the fillings form through-substrate isolations extending from the first to the second substrate side; and providing a first metallization on the first substrate side, and providing a second metallization on the second substrate side, wherein fabricating a filling in the trenches comprises depositing an insulation layer in the trenches, followed by fabricating an electrically conductive via in the trenches, which via provides an electrical pathway between the first and second substrate sides, wherein the substrate islands have a first conductivity type, wherein defining the plurality of diodes comprises defining the plurality of diodes that, to form their respective pn junction, comprise a substrate region of an opposite second conductivity type laterally embedded in the substrate island on one substrate side, and wherein the method comprises connecting diodes in different substrate islands through the first or second metallization and the via. ### Claim 12 (depends on 11) The method of claim 11, wherein the step of thinning the substrate comprises: mounting a semiconductor wafer comprising the semiconductor substrate as an integral part on a carrier substrate, the first substrate side facing the carrier substrate; grinding the semiconductor wafer from the second substrate side. ### Claim 13 (depends on 11) The method of claim 11, comprising, before the thinning, a fabrication of a metallization on the first substrate side.