# US 8,541,849 B2 · Noise shielding techniques for ultra low current measurements in biochemical applications

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- Number: US 8,541,849 B2
- Document ID: US8541849B2
- Status: Granted
- Kind: B2
- Application number: 13/396,522
- Filed: 2012-02-14
- Published: 2013-08-15
- Granted: 2013-09-24
- Earliest claimed: 2012-02-14
- Assignees: Genia Technologies, Inc.
- Applicants: Roger Chen
- Inventors: Roger Chen
- Web page: https://patentgrep.com/patent/US8541849B2

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- G01N 27/44756: {Apparatus specially adapted therefor}
- G01N 27/44791: {Microapparatus (sample containers with integrated microfluidic structures B01L3/5027)}
- G01N 33/48721: {Investigating individual macromolecules, e.g. by translocation through nanopores (Coulter counters in general G01N15/12; fabrication methods for nanoscale apertures B81B1/00; sequencing of nucleic acids C12Q1/68)}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/423: {Shielding layers}
- H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
- B82Y 15/00: Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
- H10D 1/692: {Electrodes}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A device having an integrated noise shield is disclosed. The device includes a plurality of vertical shielding structures substantially surrounding a semiconductor device. The device further includes an opening above the semiconductor device substantially filled with a conductive fluid, wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation. In some embodiments, the device further includes a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation. In some embodiments, the opening is configured to allow a biological sample to be introduced into the semiconductor device. In some embodiments, the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together. In some embodiments, the device comprises a nanopore device, and wherein the nanopore device comprises a single cell of a nanopore array.

## Claims

### Claim 1

A device having an integrated noise shield, comprising:
a plurality of vertical shielding structures substantially surrounding a semiconductor device; and
an opening above the semiconductor device substantially filled with a conductive fluid;
wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation.

### Claim 2 (depends on 1)

The device of claim 1, further comprising a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation.

### Claim 3 (depends on 2)

The device of claim 2, wherein the conductive bottom shield comprises a metal layer.

### Claim 4 (depends on 2)

The device of claim 2, wherein the conductive bottom shield comprises a substrate layer.

### Claim 5 (depends on 1)

The device of claim 1, wherein the opening is configured to allow a biological sample to be introduced into the semiconductor device.

### Claim 6 (depends on 1)

The device of claim 1, wherein the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.

### Claim 7 (depends on 6)

The device of claim 6, wherein the plurality of vias are arranged in a single concentric ring surrounding the semiconductor device.

### Claim 8 (depends on 6)

The device of claim 6, wherein the plurality of vias are arranged in a plurality of concentric rings, and wherein the vias in a first ring of vias are offset from the vias in a second ring of vias.

### Claim 9 (depends on 1)

The device of claim 1, wherein the conductive fluid comprises an electrolyte.

### Claim 10 (depends on 1)

The device of claim 1, wherein the device comprises a nanopore device, and wherein the nanopore device comprises a single cell of a nanopore array.

### Claim 11 (depends on 1)

The device of claim 1, further comprising a conductive layer forming a portion of the integrated noise shield, wherein the conductive layer is above the plurality of vertical shielding structures, and wherein the conductive layer is extended horizontally and radially outwards from the plurality of vertical shielding structures, shielding ambient radiation from passing through a plurality of gaps between the plurality of vertical shielding structures.

### Claim 12 (depends on 1)

The device of claim 1, further comprising more than one conductive layers forming a portion of the integrated noise shield, and further comprising an oxide layer between the more than one conductive layers, and wherein the oxide layer is configured to form a capacitor.

### Claim 13 (depends on 1)

The device of claim 1, further comprising an oxide layer insulating a conductive layer from the conductive fluid.

### Claim 14 (depends on 13)

The device of claim 13, wherein the oxide layer is configured to form a capacitor.

### Claim 15

A method for shielding a device from noise, comprising:
providing a plurality of vertical shielding structures substantially surrounding a semiconductor device; and
providing an opening above the semiconductor device substantially filled with a conductive fluid;
wherein the plurality of vertical shielding structures and the conductive fluid shield the semiconductor device from ambient radiation.

### Claim 16 (depends on 15)

The method of claim 15, further comprising providing a conductive bottom shield below the semiconductor device shielding the semiconductor device from ambient radiation.

### Claim 17 (depends on 15)

The method of claim 15, wherein the opening is configured to allow a biological sample to be introduced into the semiconductor device.

### Claim 18 (depends on 15)

The method of claim 15, wherein the vertical shielding structures comprise a plurality of vias, wherein each of the plurality of vias connects more than one conductive layers together.

### Claim 19 (depends on 18)

The method of claim 18, wherein the plurality of vias are arranged in a single concentric ring surrounding the semiconductor device.

### Claim 20 (depends on 18)

The method of claim 18, wherein the plurality of vias are arranged in a plurality of concentric rings, and wherein the vias in a first ring of vias are offset from the vias in a second ring of vias.

### Claim 21 (depends on 15)

The method of claim 15, wherein the conductive fluid comprises an electrolyte.

### Claim 22 (depends on 15)

The method of claim 15, wherein the device comprises a nanopore device, and wherein the nanopore device comprises a single cell of a nanopore array.