# US 8,541,815 B2 · High electron mobility transistor circuit

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- Number: US 8,541,815 B2
- Document ID: US8541815B2
- Status: Granted
- Kind: B2
- Application number: 13/351,869
- Filed: 2012-01-17
- Published: 2012-09-20
- Granted: 2013-09-24
- Earliest claimed: 2011-03-18
- Assignees: Fujitsu Semiconductor Limited
- Applicants: Yoshihiro Takemae; Tsutomu Hosoda; Toshiya Sato
- Inventors: Yoshihiro Takemae; Tsutomu Hosoda; Toshiya Sato
- Web page: https://patentgrep.com/patent/US8541815B2

## CPC

- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10D 64/111: {Field plates}
- H10D 64/112: {comprising multiple field plate segments}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/257: {for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673)}
- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10W 74/43: comprising oxides, nitrides or carbides, e.g. ceramics or glasses
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A transistor circuit includes a first high electron mobility transistor and a second high electron mobility transistor having a negative threshold voltage, wherein a source of the second high electron mobility transistor is coupled to a gate of the first high electron mobility transistor, and a gate of the second high electron mobility transistor is coupled to a source of the first high electron mobility transistor.

## Claims

### Claim 1

A transistor circuit comprising:
a first high electron mobility transistor; and
a second high electron mobility transistor having a negative threshold voltage,
wherein a source of the second high electron mobility transistor is coupled to a gate of the first high electron mobility transistor, and
a gate of the second high electron mobility transistor is coupled to a source of the first high electron mobility transistor.

### Claim 2 (depends on 1)

The transistor circuit according to claim 1,
wherein the first high electron mobility transistor includes a first field plate including at least a portion extending between the gate and the drain thereof.

### Claim 3 (depends on 2)

The transistor circuit according to claim 2,
wherein the first high electron mobility transistor further includes a second field plate including at least a portion extending between the first field plate and the drain thereof.

### Claim 4 (depends on 1)

The transistor circuit according to claim 1,
wherein the second high electron mobility transistor includes a field plate including at least a portion extending between the gate and the drain thereof and being coupled to the source of the first high electron mobility transistor.

### Claim 5 (depends on 1)

The transistor circuit according to claims 1, further comprising:
a third high electron mobility transistor coupled in series to the second high electron mobility transistor,
wherein the third high electron mobility transistor includes a gate coupled to the drain of the first high electron mobility transistor, and has a negative threshold voltage.

### Claim 6 (depends on 1)

The transistor circuit according to claim 1,
wherein the second high electron mobility transistor limits a voltage between the source and the gate of the first high electron mobility transistor to a voltage smaller than a gate withstand voltage of the first high electron mobility transistor.