# US 8,541,788 B2 · LED with current confinement structure and surface roughening

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- Number: US 8,541,788 B2
- Document ID: US8541788B2
- Status: Granted
- Kind: B2
- Application number: 12/581,759
- Filed: 2009-10-19
- Published: 2010-02-11
- Granted: 2013-09-24
- Earliest claimed: 2005-01-24
- Assignees: Cree, Inc.
- Applicants: Steven P. Denbaars; Shuji Nakamura; Max Batres
- Inventors: Steven P. Denbaars; Shuji Nakamura; Max Batres
- Web page: https://patentgrep.com/patent/US8541788B2

## CPC

- H10H 20/833: Transparent materials
- H10H 20/8162: {Current-blocking structures}
- H10H 20/82: Roughened surfaces, e.g. at the interface between epitaxial layers
- H10H 20/835: {Reflective materials}
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS

## Abstract

A light emitting diode having a vertical orientation with an ohmic contact on portions of a top surface of the diode and a reflective layer adjacent the light emitting region of the diode. This light emitting diode includes a confinement structure. The confinement structure may be an opening in the reflective layer generally beneath the top ohmic contact that defines a non-contact area between the reflective layer and the light emitting region of the diode to encourage current flow to take place other than at the non-contact area to in turn decrease the number of light emitting recombinations beneath the ohmic contact and increase the number of light emitting recombinations in the areas not beneath said ohmic contact. The LED may include roughened emitting surfaces to further enhance light extraction.

## Claims

### Claim 1

A light emitting diode having a vertical orientation, comprising:
a top ohmic contact on portions of a top surface of said diode;
a reflective layer adjacent a semiconductor material layer of said diode;
a passivated portion embedded in, and completely surrounded by, said semiconductor material layer beneath said top ohmic contact that defines a less conductive area between said reflective layer and an active region of said diode; and
a roughened surface of said light emitting diode.

### Claim 2 (depends on 1)

The light emitting diode according to claim 1 on a substrate and having an ohmic contact to said substrate that is larger in area than said top ohmic contact.

### Claim 3 (depends on 2)

The light emitting diode according to claim 2, wherein said reflective layer is positioned between said substrate and said semiconductor material layer.

### Claim 4 (depends on 1)

The light emitting diode according to claim 1, wherein the size of said passivated portion is substantially the same area as the size of said top ohmic contact.

### Claim 5 (depends on 1)

The light emitting diode according to claim 1, wherein said semiconductor material layer comprises a plurality of Group III nitride layers, including at least one p-type layer and at least one n-type layer.

### Claim 6 (depends on 1)

The light emitting diode according to claim 1, wherein said passivation portion comprises an ion implanted region.

### Claim 7 (depends on 1)

The light emitting diode according to claim 1, wherein said passivation portion comprises an oxidation region.

### Claim 8 (depends on 1)

The light emitting diode according to claim 1, wherein said passivation portion comprises a current blocking region.

### Claim 9 (depends on 1)

The light emitting diode according to claim 1, wherein said roughened surface comprises a roughened top surface of said light emitting diode.

### Claim 10 (depends on 9)

The light emitting diode according to claim 9, wherein said roughened top surface comprises a roughened semiconductor material layer.

### Claim 11 (depends on 9)

The light emitting diode according to claim 9, further comprising a transparent conducting layer on said light emitting diode and wherein said roughened top surface comprises a roughened top surface of said transparent conducting layer.

### Claim 12 (depends on 1)

The light emitting diode according to claim 1, wherein said semiconductor material layer is a unitary semiconductor material layer and wherein said passivated portion is embedded in said unitary semiconductor layer.