# US 8,541,775 B2 · Schottky diode, resistive memory device having schottky diode and method of manufacturing the same

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- Number: US 8,541,775 B2
- Document ID: US8541775B2
- Status: Granted
- Kind: B2
- Application number: 13/331,698
- Filed: 2011-12-20
- Published: 2012-12-06
- Granted: 2013-09-24
- Earliest claimed: 2011-05-31
- Assignees: Hynix Semiconductor Inc.
- Applicants: Seung Beom Baek; Young Ho Lee; Jin Ku Lee; Mi Ri Lee
- Inventors: Seung Beom Baek; Young Ho Lee; Jin Ku Lee; Mi Ri Lee
- Web page: https://patentgrep.com/patent/US8541775B2

## CPC

- H10D 8/60: Schottky-barrier diodes
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10N 70/066: {by filling of openings, e.g. damascene method}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8413: {adapted for resistive heating}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A schottky diode, a resistive memory device including the schottky diode and a method of manufacturing the same. The resistive memory device includes a semiconductor substrate including a word line, a schottky diode formed on the word line, and a storage layer formed on the schottky diode. The schottky diode includes a first semiconductor layer, a conductive layer formed on the first semiconductor layer and having a lower work function than the first semiconductor layer, and a second semiconductor layer formed on the to conductive layer.

## Claims

### Claim 1

A schottky diode, comprising:
a first semiconductor layer;
a conductive layer formed on the first semiconductor layer and having a lower work function than the first semiconductor layer; and
a second semiconductor layer formed on the conductive layer.

### Claim 2 (depends on 1)

The schottky diode of claim 1, wherein the first semiconductor layer includes a silicon (Si)-containing amorphous layer or a Si-containing poly layer.

### Claim 3 (depends on 1)

The schottky diode of claim 1, wherein the second semiconductor layer includes a Si-containing amorphous layer doped with impurities or a Si-containing poly layer doped with impurities.

### Claim 4 (depends on 1)

The schottky diode of claim 1, wherein the conductive layer includes a silicon germanium (SiGe) layer.

### Claim 5

A resistive memory device, comprising:
a semiconductor substrate including a word line;
a schottky diode formed on the word line; and
a storage layer formed on the schottky diode,
wherein the schottky diode includes:
a first semiconductor layer;
a conductive layer formed on the first semiconductor layer and having a lower work function than the first semiconductor layer; and
a second semiconductor layer formed on the conductive layer.

### Claim 6 (depends on 5)

The resistive memory device of claim 5, wherein the first semiconductor layer includes a silicon (Si)-containing amorphous layer or a Si-containing poly layer.

### Claim 7 (depends on 5)

The resistive memory device of claim 5, wherein the semiconductor layer includes a Si-containing amorphous layer doped with impurities or a Si-containing poly layer doped with impurities.

### Claim 8 (depends on 5)

The resistive memory device of claim 5, wherein the conductive layer includes a silicon germanium (SiGe) layer.

### Claim 9 (depends on 5)

The resistive memory device of claim 5, further comprising a lower barrier metal layer disposed between the word line and the schottky diode.

### Claim 10 (depends on 5)

The resistive memory device of claim 5, wherein the storage layer includes:
a heating electrode disposed on the schottky diode; and
a phase-change material layer disposed on the heating electrode.

### Claim 11 (depends on 10)

The resistive memory device of claim 10, further comprising a barrier metal layer disposed between the schottky diode and the heating electrode.

### Claim 12 (depends on 5)

The resistive memory device of claim 5, wherein the schottky diode includes a plurality of pillar structures and the storage layer is stacked on the schottky diode and surrounded by an interlayer insulating layer.

### Claim 13 (depends on 5)

The resistive memory device of claim 5, comprising an upper electrode formed on the storage layer.