# US 8,541,771 B2 · Semiconductor device and method of manufacturing the same

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- Number: US 8,541,771 B2
- Document ID: US8541771B2
- Status: Granted
- Kind: B2
- Application number: 13/157,681
- Filed: 2011-06-10
- Published: 2012-06-21
- Granted: 2013-09-24
- Earliest claimed: 2010-12-17
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Jun-youn Kim; Su-hee Chae; Hyun-gi Hong; Young-jo Tak
- Inventors: Jun-youn Kim; Su-hee Chae; Hyun-gi Hong; Young-jo Tak
- Web page: https://patentgrep.com/patent/US8541771B2

## CPC

- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P 14/271: {characterised by the preparation of substrate for selective deposition}
- H10P 14/276: {Lateral overgrowth}
- H10P 14/2904: {Silicon carbide}
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/3216: {Nitrides}
- H10P 14/3241: {being conductive materials}
- H10P 14/3248: {consisting of two layers}
- H10P 14/3256: {Microstructure}
- H10P 14/3416: {Nitrides}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Example embodiments relate to a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device may include a pre-seeding layer and a nucleation layer. The pre-seeding layer may include a first material for pre-seeding and a second material for masking so as to reduce tensile stress.

## Claims

### Claim 1

A semiconductor device comprising:
a pre-seeding layer comprising a first material and a second material distinct from the first material, the first material having properties that facilitate pre-seeding and the second material having properties that facilitate masking;
a nucleation layer on the pre-seeding layer;
a plurality of nitride semiconductor layers on the nucleation layer,
at least one masking layer between the plurality of nitride semiconductor layers; and
at least one inter layer between the plurality of nitride semiconductor layers, the at least one inter layer being on the at least one masking layer, the at least one inter layer configured to compensate for a tensile stress,
wherein the at least one inter layer comprises a material selected from the group consisting of Alx0Iny0Ga1-x0-y0N (0≦x0, y0≦1, x0+y0≦1), step graded AlxInyGa1-x-yN (0≦x, y≦1, x+y≦1), and Alx1Iny1Ga1-x1-y1N/Alx2Iny2Ga1-x2-y2N (0≦x1, x2, y1, y2≦1, x1≠x2 or y1≠y2) superlattice.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first material comprises aluminum (Al).

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the second material comprises magnesium (Mg) or silicon (Si).

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the plurality of nitride semiconductor layers comprise a nitride containing gallium.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the nucleation layer comprises AlN.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, further comprising:
at least one buffer layer between the nucleation layer and the plurality of nitride semiconductor layers.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, wherein the at least one buffer layer comprises AlxInyGa1-x-yN (0≦x, y≦1, x+y≦1).

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the at least one masking layer comprises silicon nitride (SiNx) or titanium nitride (TiN).

### Claim 9 (depends on 1)

The semiconductor device of claim 1, further comprising:
a substrate below the plurality of nitride semiconductor layers.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the substrate comprises a silicon (Si) substrate or a silicon carbide (SiC) substrate.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein the nucleation layer comprises Mg or Si.

### Claim 12

A semiconductor device comprising:
a first pre-seeding layer comprising a first material and a second material distinct from the first material, the first material having properties that facilitate pre-seeding and the second material having properties that facilitate masking;
a first nucleation layer on the first pre-seeding layer;
a second pre-seeding layer on the first nucleation layer, the second pre-seeding layer comprising the first material that facilitates pre-seeding and the second material that facilitates masking; and
a second nucleation layer on the second pre-seeding layer.

### Claim 13

A method of manufacturing a semiconductor device, the method comprising:
growing a pre-seeding layer on a substrate, the pre-seeding layer comprising a first material and a second material distinct from the first material, the first material having properties that facilitate pre-seeding and the second material having properties that facilitate masking;
growing a nucleation layer on the pre-seeding layer; and
growing a nitride semiconductor layer on the nucleation layer,
wherein the growing of the nucleation layer comprises injecting Al, Mg, and NH3 sources into a reactor, or injecting Al, Si, and NH3 sources into the reactor.

### Claim 14 (depends on 13)

The method of claim 13, wherein the first material comprises Al.

### Claim 15 (depends on 13)

The method of claim 13, wherein the second material comprises Mg or Si.

### Claim 16 (depends on 13)

The method of claim 13, wherein the nitride semiconductor layer comprises a nitride containing gallium.

### Claim 17 (depends on 13)

The method of claim 13, wherein the nucleation layer comprises AlN.

### Claim 18 (depends on 13)

The method of claim 13, further comprising:
growing at least one buffer layer between the nucleation layer and the nitride semiconductor layer.

### Claim 19 (depends on 13)

The method of claim 13, further comprising:
growing at least one masking layer between the nucleation layer and the nitride semiconductor layer.

### Claim 20 (depends on 19)

The method of claim 19, wherein the at least one masking layer comprises silicon nitride (SiNx) or titanium nitride (TiN).

### Claim 21 (depends on 19)

The method of claim 19, further comprising:
growing at least one inter layer on the at least one masking layer to compensate for a tensile stress.

### Claim 22 (depends on 21)

The method of claim 21, wherein the at least one inter layer comprises a material selected from the group consisting of Alx0Iny0Ga1-x0-y0N (0≦x0, y0≦1, x0+y0≦1), step graded AlxInyGa1-x-yN (0≦x, y≦1, x+y≦1), and Alx1Iny1Ga1-x1-y1N/Alx2Iny2Ga1-x2-y2N (0≦x1, x2, y1, y2≦1, x1≠x2 or y1≠y2) superlattice.

### Claim 23 (depends on 13)

The method of claim 13, further comprising:
removing the substrate.

### Claim 24 (depends on 13)

The method of claim 13, wherein the substrate comprises a silicon (Si) substrate or a silicon carbide (SiC) substrate.

### Claim 25 (depends on 13)

The method of claim 13, wherein growing the nucleation layer comprises injecting the second material for masking during growth of the nucleation layer.