# US 8,541,297 B2 · Manufacturing method of semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,541,297 B2 - Document ID: US8541297B2 - Status: Granted - Kind: B2 - Application number: 13/046,761 - Filed: 2011-03-13 - Published: 2011-09-29 - Granted: 2013-09-24 - Earliest claimed: 2010-03-29 - Assignees: Renesas Electronics Corporation - Applicants: Tadashi Yamaguchi; Takuya Futase - Inventors: Tadashi Yamaguchi; Takuya Futase - Web page: https://patentgrep.com/patent/US8541297B2 ## CPC - H10D 64/0131: {the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation} - H10D 64/0112: {using conductive layers comprising silicides} - H10D 84/017: {Manufacturing their source or drain regions, e.g. silicided source or drain regions} - H10D 84/0174: {the gate conductors being silicided} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10P 72/0468: {comprising a chamber adapted to a particular process} - H10P 72/3306: {Horizontal transfer of a single workpiece} - H10P 72/7611: {characterised by edge profile or support profile} - H10P 72/7618: {characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating carrousel} - H10D 30/0212: {using self-aligned silicidation} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract The present invention improves the performance of a semiconductor device wherein a metal silicide layer is formed through a salicide process. A metal silicide layer is formed over the surfaces of first and second gate electrodes, n+-type semiconductor regions, and p+-type semiconductor regions through a salicide process of a partial reaction type without the use of a salicide process of a whole reaction type. In a heat treatment for forming the metal silicide layer, by heat-treating a semiconductor wafer not with an annealing apparatus using lamps or lasers but with a thermal conductive annealing apparatus using carbon heaters, a thin metal silicide layer is formed with a small thermal budget and a high degree of accuracy and microcrystals of NiSi are formed in the metal silicide layer through a first heat treatment. ## Claims ### Claim 1 A manufacturing method of a semiconductor device, comprising the steps of: (a) preparing a semiconductor substrate; (b) forming a semiconductor region in the semiconductor substrate; (c) forming a metal film over the semiconductor substrate including over the semiconductor region; (d) forming a metal silicide layer at the upper part of the semiconductor region by applying a first heat treatment and selectively reacting the metal film with the semiconductor region; (e) after the process (d), removing the unreacted part of the metal film and keeping the metal silicide layer over the semiconductor region; (f) after the process (e), applying a second heat treatment, the heat treatment temperature of which is higher than that of the first heat treatment; and (g) after the process (f), forming an insulation film over the semiconductor substrate including over the metal silicide layer, wherein the first heat treatment in the process (d) is applied at 250° C. to 300° C., wherein a temperature-rise rate in an annealing apparatus for applying the first heat treatment in the process (d) is 250° C./sec, to 500° C./sec., wherein the metal silicide layer formed through the first heat treatment in the process (d) contains NiSi, and wherein crystal grain sizes of NiSi in the metal silicide layer formed through the first heat treatment in the process (d) are not more than one third of crystal grain sizes of NiSi in the metal silicide layer after the second heat treatment in the process (f). ### Claim 2 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein, in the annealing apparatus for applying the first heat treatment in the process (d), heaters to heat the semiconductor device attain a target temperature for heat-treating the semiconductor device already when the semiconductor substrate is charged in the annealing apparatus. ### Claim 3 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein, in the annealing apparatus for applying the first heat treatment in the process (d), the semiconductor substrate is heat-treated by disposing conductors in respective vicinities on a main surface side and a back surface side of the semiconductor substrate, applying electric current to the conductors, and making the conductors generate heat. ### Claim 4 (depends on 3) A manufacturing method of a semiconductor device according to claim 3, wherein the conductors can move in directions perpendicular to the main surface of the semiconductor substrate charged in the annealing apparatus, and, after the semiconductor substrate is charged in the annealing apparatus, heat treatment is applied by moving the conductors close to the main surface and the back surface of the semiconductor substrate respectively. ### Claim 5 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein, in the annealing apparatus for applying the first heat treatment in the process (d), the heat treatment is applied with carbon heaters or by resistance heating. ### Claim 6 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein the annealing apparatus for applying the first heat treatment in the process (d) is a sheet-type annealing apparatus. ### Claim 7 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein, in the process (d), the metal silicide layer is formed by reacting a part of the thickness of the metal film formed over the semiconductor region with the semiconductor region. ### Claim 8 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein, at the first heat treatment in the process (d), overshoot, which means that a temperature of the semiconductor substrate exceeds a heat treatment temperature, does not occur. ### Claim 9 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein a gate electrode is formed over the semiconductor substrate while a gate insulation film is interposed between the gate electrode and the semiconductor substrate after the process (b) and before the process (c), wherein the metal film is formed over the semiconductor substrate and simultaneously the metal film is formed over the gate electrode in the process (c), wherein the metal silicide layer is formed at the upper part of the gate electrode by reacting the metal film formed over the gate electrode with the gate electrode in the process (d), and wherein the unreacted part of the metal film formed over the gate electrode is removed and the metal silicide layer remains at the upper part of the gate electrode in the process (d). ### Claim 10 (depends on 1) A manufacturing method of a semiconductor device according to claim 1, wherein the metal film contains an alloy of Ni and Pt. ### Claim 11 A manufacturing method of a semiconductor device, comprising the steps of: (a) preparing a semiconductor substrate; (b) forming a semiconductor region in the semiconductor substrate; (c) forming a metal film over the semiconductor substrate including over the semiconductor region; (d) forming a metal silicide layer at the upper part of the semiconductor region by applying a first heat treatment having a first heat treatment temperature, and selectively reacting the metal film with the semiconductor region; (e) after the process (d), removing the unreacted part of the metal film and keeping the metal silicide layer over the semiconductor region; (f) after the process (e), applying a second heat treatment, the heat treatment temperature of which is higher than that of the first heat treatment; and (g) after the process (f), forming an insulation film over the semiconductor substrate including over the metal silicide layer, wherein the time taken for the temperature of the semiconductor substrate in the process (d) to reach the first heat treatment temperature for reacting the metal film with the semiconductor region from a temperature of the semiconductor substrate immediately before commencement of the first heat treatment is less than one second, and wherein crystal grain sizes in the metal silicide layer formed through the first heat treatment in the process (d) are not more than one third of crystal grain sizes in the metal silicide layer after the second heat treatment in the process (f). ### Claim 12 (depends on 11) A manufacturing method of a semiconductor device according to claim 11, wherein, in an annealing apparatus for applying the first heat treatment in the process (d), the semiconductor substrate is heat-treated by disposing conductors in respective vicinities on a main surface side and a back surface side of the semiconductor substrate, applying electric current to the conductors, and making the conductors generate heat. ### Claim 13 (depends on 11) A manufacturing method of a semiconductor device according to claim 11, wherein, in an annealing apparatus for applying the first heat treatment in the process (d), the heat treatment is applied with carbon heaters or by resistance heating. ### Claim 14 (depends on 11) A manufacturing method of a semiconductor device according to claim 11, wherein the metal silicide layer formed through the first heat treatment in the process (d) contains NiSi. ### Claim 15 (depends on 11) A manufacturing method of a semiconductor device according to claim 11, wherein, in the process (d), the metal silicide layer is formed by reacting a part of the thickness of the metal film formed over the semiconductor region with the semiconductor region. ### Claim 16 (depends on 11) A manufacturing method of a semiconductor device according to claim 11, wherein, at the first heat treatment in the process (d), overshoot, which means that a temperature of the semiconductor substrate exceeds a heat treatment temperature, does not occur. ### Claim 17 (depends on 16) A manufacturing method of a semiconductor device according to claim 16, wherein crystal grain sizes of NiSi in the metal silicide layer formed through the first heat treatment in the process (d) are not more than one third of crystal grain sizes of NiSi in the metal silicide layer after the second heat treatment in the process (f). ### Claim 18 (depends on 11) A manufacturing method of a semiconductor device according to claim 11, wherein a gate electrode is formed over the semiconductor substrate while a gate insulation film is interposed between the gate electrode and the semiconductor substrate after the process (b) and before the process (c), wherein the metal film is formed over the semiconductor substrate and simultaneously the metal film is formed over the gate electrode in the process (c), wherein the metal silicide layer is formed at the upper part of the gate electrode by reacting the metal film formed over the gate electrode with the gate electrode in the process (d), and wherein unreacted part of the metal film over the gate electrode is removed and the metal silicide layer remains at the upper part of the gate electrode in the process (d).