# US 8,541,263 B1 · Thermoset molding for on-package decoupling in flip chips > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,541,263 B1 - Document ID: US8541263B1 - Status: Granted - Kind: B1 - Application number: 12/197,072 - Filed: 2008-08-22 - Granted: 2013-09-24 - Earliest claimed: 2008-08-22 - Assignees: Altera Corporation - Applicants: Teik Tiong Toong; Loon Kwang Tan - Inventors: Teik Tiong Toong; Loon Kwang Tan - Web page: https://patentgrep.com/patent/US8541263B1 ## CPC - H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) - H10W 40/70: Fillings or auxiliary members in containers or in encapsulations for thermal protection or control - H10W 72/072: {of bump connectors} - H10W 72/073: {of die-attach connectors} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/877: {Bump connectors and die-attach connectors} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract In an exemplary embodiment, a method takes as an input a package substrate on which multiple capacitors have been mounted in a ring as part of a design to effectuate on-package decoupling. The method involves plasma cleaning the package substrate and the capacitors to remove organic contaminants. The method then involves applying a thermoset plastic to encase the capacitors on the package substrate. In one embodiment, a heated metal mold is utilized and the thermoset plastic is placed therein. The method includes opening the metal mold and curing the molded thermoset plastic by baking the molded thermoset plastic at an elevated temperature. ## Claims ### Claim 1 A method, comprising: plasma cleaning a package substrate to which a plurality of capacitors have been mounted in a ring formation around a peripheral surface of the package substrate to provide on-package decoupling for a semiconductor device package; applying a molding compound to the peripheral surface of the package substrate surrounding the capacitors, wherein the molding compound is guided by a mold; heating the molding compound in the mold; opening the mold to expose the heated molding compound; curing the exposed molding compound for a period of time, wherein the mold is opened prior to the curing, and wherein the cured molding compound comprises a ring of cured molding compound surrounding the capacitors around the peripheral surface of the package substrate; placing an integrated circuit onto a top surface of the package substrate within an area defined by the ring formation, the placing occurring after the applying and the heating, the integrated circuit placed within an opening defined within interior sidewalls of the cured molding compound, and wherein a gap exists between sides of the integrated circuit and the ring of cured molding compound; and applying a layer of thermal integrate material to a surface of the integrated circuit. ### Claim 2 (depends on 1) The method of claim 1, wherein a coefficient of thermal expansion for the package substrate is within about 5 parts per million of a coefficient of thermal expansion for the molding compound, and wherein the package substrate comprises a plurality of pairs of alternating layers of an insulator and a conductor. ### Claim 3 (depends on 1) The method of claim 1, wherein the mold is heated prior to applying the molding compound. ### Claim 4 (depends on 1) The method of claim 1, wherein the molding compound is a semiconductor epoxy resin. ### Claim 5 (depends on 1) The method of claim 1, wherein the molding compound is a thermoset plastic. ### Claim 6 (depends on 1) The method of claim 1, wherein the curing operation includes exposing the package substrate to an elevated temperature. ### Claim 7 (depends on 6) The method of claim 6, wherein the elevated temperature is about 175 degrees Celsius and the period of time is about five hours. ### Claim 8 (depends on 5) The method of claim 5 wherein the thermoset plastic is heated at a temperature of approximately 175 degrees Celsius in the mold for a period of approximately 120 seconds after the molding compound is placed into the mold. ### Claim 9 (depends on 1) The method of claim 1, wherein the plasma cleaning includes striking an argon based plasma. ### Claim 10 (depends on 1) The method of claim 1, wherein the mold encompasses an outer peripheral region of the package substrate and wherein the integrated circuit is spaced apart from the cured molding compound. ### Claim 11 (depends on 1) The method of claim 1 further comprising; flowing underfill between a bottom surface of the integrated circuit and the top surface of the package substrate, wherein side edges of the integrated circuit and an outer periphery of the underfill are spaced apart from the interior sidewalls of the molding compound. ### Claim 12 An integrated circuit prepared by a process comprising: plasma cleaning a package substrate to which a plurality of capacitors have been mounted in a ring formation around a peripheral surface of the package substrate to provide on-package decoupling for a semiconductor device package; applying a molding compound to the peripheral surface of the package substrate surrounding the capacitors, wherein the molding compound is guided by a mold; heating the molding compound in the mold; opening the mold to expose the heated molding compound; curing the exposed molding compound for a period of time, wherein the mold is opened prior to the curing, and wherein the cured molding compound comprises a ring of cured molding compound surrounding the capacitors around the peripheral surface of the package substrate; placing an integrated circuit onto a top surface of the package substrate within an area defined by the ring formation, the placing occurring after the applying and the heating, the integrated circuit placed within an opening defined within interior sidewalls of the cured molding compound, and wherein a gap exists between sides of the integrated circuit and the ring of cured molding compound; and applying a layer of thermal integrate material to a surface of the integrated circuit. ### Claim 13 (depends on 12) The integrated circuit of claim 12, further comprising: heating the mold prior to applying the molding compound. ### Claim 14 (depends on 12) The integrated circuit of claim 12, wherein the mold encompasses an outer peripheral region of the package substrate, wherein the package substrate comprises a plurality of pairs of alternating layers of an insulator and a conductor and wherein the integrated circuit is spaced apart from the cured molding compound. ### Claim 15 (depends on 12) The integrated circuit of claim 12, wherein the molding compound is a thermoset plastic that is heated at a temperature of approximately 175 degrees Celsius in the mold for a period of approximately 120 seconds after the molding compound is placed into the mold. ### Claim 16 (depends on 12) The integrated circuit of claim 12, further comprising; flowing underfill between a bottom surface of the integrated circuit and the top surface of the package substrate, wherein side edges of the integrated circuit and an outer periphery of the underfill are spaced apart from the interior sidewalls of the molding compound. ### Claim 17 A method, comprising: mounting a plurality of capacitors in a ring formation to a peripheral region of a top surface of a package substrate to provide on-package decoupling for a semiconductor device package, the package substrate comprising a plurality of alternating layers of an insulator and a conductor; applying a molding compound to the peripheral region of the top surface of the package substrate, the molding compound surrounding the capacitors; heating the molding compound; opening a mold encompassing the molding compound to expose the heated molding compound; curing the exposed molding compound for a period of time, wherein the mold is opened prior to the curing, and wherein the cured molding compound comprises a ring of cured molding compound surrounding the capacitors around the peripheral region of the package substrate; placing an integrated circuit onto a top surface of the package substrate within an area defined by the ring formation, the placing occurring at least after the applying and the heating, the integrated circuit placed within an opening defined within interior sidewalls of the cured molding compound, and wherein a gap exists between sides of the integrated circuit and the ring of cured molding compound; applying a layer of thermal integrate material to a surface of the integrated circuit; applying a layer of thermal adhesive to a surface of the cured molding compound; and placing a heatsink over the thermal integrate material and the thermal adhesive. ### Claim 18 (depends on 17) The method of claim 17, wherein the molding compound is a semiconductor epoxy resin. ### Claim 19 (depends on 17) The method of claim 17, wherein the molding compound is a thermoset plastic. ### Claim 20 (depends on 17) The method of claim 17, wherein the curing operation includes exposing the package substrate to an elevated temperature. ### Claim 21 (depends on 20) The method of claim 20, wherein the elevated temperature is about 175 degrees Celsius and the period of time is about five hours.