# US 8,541,259 B2 · Semiconductor device and manufacturing method thereof

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- Number: US 8,541,259 B2
- Document ID: US8541259B2
- Status: Granted
- Kind: B2
- Application number: 13/442,334
- Filed: 2012-04-09
- Published: 2012-10-25
- Granted: 2013-09-24
- Earliest claimed: 2009-12-07
- Assignees: Fujitsu Semiconductor Limited
- Applicants: Takumi Ihara
- Inventors: Takumi Ihara
- Web page: https://patentgrep.com/patent/US8541259B2

## Abstract

A disclosed semiconductor device includes a wiring board, a semiconductor element mounted on a principal surface of the wiring board with flip chip mounting, a first conductive pattern formed on the principal surface along at least an edge portion of the semiconductor element, a second conductive pattern formed on the principal surface along the first conductive pattern and away from the first conductive pattern, a passive element bridging between the first conductive pattern and the second conductive pattern on the principal surface of the wiring board, and a resin layer filling a space between the wiring board and the semiconductor chip, wherein the resin layer extends between the semiconductor element and the first conductive pattern on the principal surface of the wiring board.

## Claims

### Claim 1

A manufacturing method of a semiconductor device comprising:
forming a first conductive pattern and a second conductive pattern in a vicinity of a mounting region of a semiconductor element on a principal surface of a wiring board;
arranging a passive element to bridge between the first conductive pattern and the second conductive pattern;
mounting the semiconductor element on the mounting region of the semiconductor element with flip chip mounting; and
supplying a resin on the mounting region of the semiconductor element.

### Claim 2

A manufacturing method of a semiconductor device comprising:
forming a first conductive pattern and a second conductive pattern in a vicinity of a mounting region of a semiconductor element on a principal surface of the wiring board;
arranging a passive element to bridge between the first conductive pattern and the second conductive pattern;
coating the mounting region with a resin; and
mounting the semiconductor element on the mounting region of the semiconductor element with flip chip mounting.