# US 8,541,256 B2 · Method of cadmium molecular beam based anneals for manufacture of HgCdTe photodiode arrays > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,541,256 B2 - Document ID: US8541256B2 - Status: Granted - Kind: B2 - Application number: 13/421,860 - Filed: 2012-03-16 - Published: 2012-10-18 - Granted: 2013-09-24 - Earliest claimed: 2011-04-17 - Applicants: Chang-Feng Wan - Inventors: Chang-Feng Wan - Web page: https://patentgrep.com/patent/US8541256B2 ## CPC - H10F 39/103: {the at least one element covered by H10F30/00 having potential barriers, e.g. integrated devices comprising photodiodes or phototransistors} - H10F 30/222: the potential barrier being a PN heterojunction - H10F 71/1253: {comprising at least three elements, e.g. HgCdTe} - H10F 71/128: {Annealing} - H10F 77/1237: {having at least three elements, e.g. HgCdTe} - Y02E 10/50: Photovoltaic [PV] energy - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION ## Abstract In the preferred embodiment of the present invention, narrow bandgap II-VI compound semiconductor HgxCd1-xTe (0.1≦x≦0.5) (HgCdTe) wafers are annealed under Cd supersaturated conditions by exposing the HgCdTe planar or mesa surfaces to a Cd molecular beam in a vacuum deposition system before, during, and/or after anneals performed during individual photodiode fabrication process steps or HgCdTe epitaxial growth steps for eliminating or neutralizing the bulk or interfacial defects. ## Claims ### Claim 1 A method for thermal treating a HgCdTe layer on a substrate in accordance to the following process steps in this order: (1) placing said HgCdTe layer in a vacuum deposition system equipped with a Cd molecular beam source, (2) heating said HgCdTe layer to an elevated temperature for anneal or thermal treatment, (3) Impinging the front surface of said HgCdTe layer with said Cd molecular beam with a flux exceeding that for Cd saturation of said front surface for at least 15 minutes during said anneal, (4) cooling said HgCdTe layer to a certain ending temperature, (5) turning off said Cd molecular beam, and (6) cooling said HgCdTe layer to room temperature. ### Claim 2 (depends on 1) The method as set forth in claim 1, wherein said ending temperature is between 80 and 140 C. ### Claim 3 (depends on 1) The method as set forth in claim 1 wherein said HgCdTe layer has mesas and/or trenches formed thereon before said anneal. ### Claim 4 (depends on 3) The method as set forth in claim 3, wherein the formation of said mesas and/or trenches and said annealing are performed in situ. ### Claim 5 (depends on 1) The method as set forth in claim 1 wherein said HgCdTe layer comprises un-activated or partially activated extrinsic dopant such as arsenic. ### Claim 6 (depends on 1) The method as set forth in claim 1 further comprises a step for depositing a CdTe film using an additional Te-containing source in said step (3). ### Claim 7 (depends on 6) The method as set forth in claim 6, wherein said CdTe film is deposited by atomic layer deposition means. ### Claim 8 (depends on 6) The method as set forth in claim 6, wherein said CdTe film is deposited in part from a Te molecular beam source with a flux significantly exceeded by said flux of said Cd molecular beam. ### Claim 9 (depends on 1) The method as set forth in claim 1, wherein said Cd molecular beam comprises only elemental Cd. ### Claim 10 (depends on 1) The method as set forth in claim 1, wherein said substrate comprises silicon, germanium or GaAs whereon said HgCdTe layer is grown by heteroepitaxy means. ### Claim 11 (depends on 1) The method as set forth in claim 1, wherein said elevated temperature is 70 C or higher. ### Claim 12 (depends on 1) The method as set forth in claim 1, wherein said time and said temperature are such that at least 200 A of graded bandgap layer with the x-value higher than 0.3 is formed on said HgCdTe surface due to Cd diffusion from said Cd molecular beam. ### Claim 13 (depends on 1) A method as set forth in claim 1, wherein said elevated temperature is cycled between 250 C and 550 C at least twice. ### Claim 14 (depends on 1) The method as set forth in claim 1, wherein said substrate comprises silicon or ROIC. ### Claim 15 A method for removing copper impurity from a CdTe or CdZnTe substrate comprising the following process steps in this order: (1) Depositing a Te-rich CdTe layer on the backside of said substrates, (2) placing said substrates in a vacuum deposition system equipped with a Cd molecular beam source, (3) heating and annealing said substrate at elevated temperatures, (4) Impinging the front surface of said HgCdTe layer with said Cd molecular beam having Cd flux intensity substantially exceeds that for Cd saturation for at least 15 minutes during said annealing, (5) cooling said substrate to room temperature, (6) removing said Te-rich CdTe layer from said CdZnTe by lapping or etching. ### Claim 16 (depends on 15) The method as set forth in claim 15 is repeated at least once. ### Claim 17 (depends on 1) The method as set forth in claim 1, wherein said elevated temperature is higher than 70 C. ### Claim 18 (depends on 1) The method as set forth in claim 1, wherein said significant amount is 100% or more. ### Claim 19 (depends on 1) The method as set forth in claim 1, wherein said Cd molecular beam comprises Cd metallorganic compound. ### Claim 20 (depends on 1) The method as set forth in claim 1, wherein said Cd molecular beam is generated by sputtering. ### Claim 21 The x-value profile of HgCdTe layer from its bare surface or its interface with an insulator layer near a p-n junction formed in said HgCdTe layer assumes that of one-sided diffusion wherein the x-value at said surface or said interface is 1.0 and decreases monotonically and continuously with depth to the starting or bulk x-value of said HgCdTe layer without any inflection point.