Optimizing circuit layouts by configuring rooms for placing devices
AssigneeCadence Design Systems, Inc.
InventorsPrakash Gopalakrishnan, Alisa Yurovsky
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorsPrakash Gopalakrishnan, Alisa Yurovsky
Estimating the term…
A computer-readable medium stores a specification for a circuit layout. The specification includes: a configuration of rooms for placing devices, one or more room constraints for the configuration of rooms, one or more groups of devices for the rooms, and one or more device constraints for devices in a same room. The configuration of rooms may include a tree-structure for the rooms. The room constraints may include a common symmetry line for a first room and a second room. The device constraints may include a self-symmetry constraint for a first device about a symmetry line in a first room. The device constraints may include a symmetry constraint for a first device and a second device about a symmetry line in a first room. The devices may include analog or RF (radio frequency) devices.
A non-transitory computer-readable medium that stores a specification for a circuit layout, the specification comprising:
A system for determining a specification for a circuit layout, comprising:
A system for storing a specification for a circuit layout, comprising:
Dependencies are inferred from the claim text.