Systems and methods for selective decode algorithm modification
AssigneeLSI Corporation
InventorsFan Zhang, Weijun Tan, Zongwang Li, Shaohua Yang
Life of this patent
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Abstract
Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes a first decoder circuit and a second decoder circuit. The first decoder circuit is operable to apply a first data decode algorithm to a decoder input to yield a decoded output. The second decoder circuit is operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.
Claims20
A data processing system, the data processing system comprising:
- a combination data decoder circuit including:
- a first decoder circuit operable to apply a first data decode algorithm to a decoder input to yield a decoded output;
- a second decoder circuit operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.
A method for data processing, the method comprising:
- applying a first data decode algorithm to a decoder input to yield a first decoded output;
- applying a second data decode algorithm to a subset of the first decoded output to modify at least one element of the decoded output to yield a modified decoded output;
- and
- applying the first data decode algorithm to the decoder input guided by the modified decoded output to yield a second decoded output.
A storage device, the storage device comprising:
- a storage medium;
- a head assembly disposed in relation to the storage medium and operable to provide a sensed signal corresponding to information on the storage medium;
- a read channel circuit including:
- an analog to digital converter circuit operable to sample an analog signal derived from the sensed signal to yield a series of digital samples;
- an equalizer circuit operable to equalize the digital samples to yield a data set;
- a data detector circuit operable to apply a data detection algorithm to the data set to yield a detected output;
- and
- a combination data decoder circuit including:
- a first decoder circuit operable to apply a first data decode algorithm to a decoder input to yield a decoded output, wherein the decoder input is derived from the detected output;
- and
- a second decoder circuit operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.
Dependencies are inferred from the claim text.