Iterative decoding of blocks with cyclic redundancy checks

A device to decode a transport block constructed from multiple sub-blocks, each sub-block being a code word that may be decoded iteratively with the information bits thereof being covered by a cyclic redundancy check, CRC, the device comprising:

• a receiver to receive the transport block;
• a decoder to perform iterations of an iterative decoding process on a particular sub-block of the multiple sub-blocks;
• at least one processor programmed to ascertain whether the CRC for the particular sub-block checks after each iteration;
• the processor programmed to stop the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations and to continue the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.

A memory storing processor-executable instructions for decoding a received transport block constructed from multiple sub-blocks, each sub-block being a code word that may be decoded iteratively with the information bits thereof being covered by a cyclic redundancy check, CRC;

• wherein the processor-executable instructions, when executed, direct a device to perform acts comprising:
• receiving the transport block;
• performing iterations of an iterative decoding process on a particular sub-block of the multiple sub-blocks;
• ascertaining whether the CRC for the particular sub-block checks after each iteration;
• stopping the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations;
• and
• continuing the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.

A method for decoding a transport block including multiple sub-blocks, each of which can be decoded iteratively, wherein the transport block also includes a single cyclic redundancy check, CRC, over an entirety of the transport block;

• the method comprising acts of:
• performing a decoding iteration on a particular sub-block of the multiple sub-blocks;
• checking the CRC for the entirety of the transport block using decoded bits obtained from the decoding iteration on the particular sub-block and decoded bits obtained from a most recent decoding iteration on other sub-blocks of the multiple sub-blocks;
• performing a decoding iteration on a different sub-block if the CRC does not check;
• stopping the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations;
• and
• continuing the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.

A method for decoding a transport block including multiple sub-blocks, each of which can be decoded iteratively, wherein the transport block also includes a single cyclic redundancy check, CRC, over an entirety of the transport block;

• the method comprising acts of:
• performing a decoding iteration on a particular sub-block of the multiple sub-blocks;
• checking the CRC for the entirety of the transport block using decoded bits obtained from the decoding iteration on the particular sub-block and decoded bits obtained using a most recent decoding iteration on other sub-blocks of the multiple sub-blocks;
• terminating the decoding iterations for all of the sub-blocks of the multiple sub-blocks if the CRC checks consecutively for a predetermined number of consecutive decoding iterations;
• stopping the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations;
• and
• continuing the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.

A method for iterative decoding of a transport block having a cyclic redundancy check, CRC, the method comprising acts of:

• receiving a transport block having multiple sub-blocks, the transport block including a CRC associated with the multiple sub-blocks;
• performing a decoding iteration on a number of sub-blocks of the multiple sub-blocks;
• ascertaining if the CRC checks with regard to the multiple sub-blocks;
• performing the decoding iteration on at least one different sub-block of the multiple sub-blocks if the CRC is not ascertained to check;
• stopping the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations;
• and
• continuing the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.

A device for iterative decoding of a transport block having a cyclic redundancy check, CRC, the device comprising:

• a receiver to receive a transport block having multiple sub-blocks, the transport block including a CRC associated with the multiple sub-blocks;
• a decoder to decode a subset of the multiple sub-blocks;
• and
• at least one processor programmed to ascertain if the CRC checks with regard to the multiple sub-blocks after the subset is decoded by the decoder, the processor programmed to cause the decoder to continue to iteratively decode other subsets of the multiple sub-blocks if the CRC is not ascertained to check after each of the subsets;
• the processor further programmed to stop the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations;
• and
• the processor further programmed to continue the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.

A memory storing processor-executable instructions for iterative decoding of a transport block having a cyclic redundancy check, CRC, wherein the processor-executable instructions, when executed, direct a device to perform acts comprising:

• receiving a transport block having multiple sub-blocks, the transport block including a CRC associated with the multiple sub-blocks, the multiple sub-blocks numbering “n”;
• performing a decoding iteration on a number of sub-blocks of the multiple sub-blocks, the number being greater than zero and less than “n”;
• ascertaining if the CRC checks with regard to the multiple sub-blocks;
• and
• performing the decoding iteration on at least one different sub-block of the multiple sub-blocks if the CRC is not ascertained to check;
• stopping the iterative decoding process for the particular sub-block if the CRC associated with the particular sub-block checks for a predetermined number of consecutive decoding iterations;
• and
• continuing the iterative decoding process for other sub-blocks for which the iterative decoding process has not been stopped until decoding iterations for all sub-blocks of the multiple sub-blocks can be stopped.