Data storage in analog memory cell arrays having erase failures

An apparatus for data storage, comprising:

• an interface, which is operative to communicate with a memory device that includes a plurality of analog memory cells;
• and
• circuitry, which is coupled to perform an erasure operation on a group of the analog memory cells, to identify as erase-failed cells one or more of the memory cells in the group that failed the erasure operation, to modify, responsively to the identified erase-failed cells, a storage configuration that is used for programming the analog memory cells in the group, and to store data within the group of the analog memory cells containing the identified erase-failed cells using the modified storage configuration.

Apparatus for data storage, comprising:

• a memory device, which comprises a plurality of analog memory cells;
• and
• a processor, which is coupled to perform an erasure operation on a group of the analog memory cells, to identify as erase-failed cells one or more of the memory cells in the group that failed the erasure operation, to modify, responsively to the identified erase-failed cells, a storage configuration that is used for programming the analog memory cells, and to store data within the group of the analog memory cells containing the identified erase-failed cells using the modified storage configuration.

A memory device, comprising:

• a plurality of analog memory cells;
• and
• Read/Write (R/W) circuitry, which is coupled to perform an erasure operation on a group of the analog memory cells, to identify as erase-failed one or more of the memory cells in the group that failed the erasure operation, and to report information regarding the identified erase-failed cells to a controller external to the memory device, so as to enable the controller to store data within the group of the analog memory cells containing the identified erase-failed cells.