DMI redundancy in multiple processor computer systems
AssigneeIntel Corporation
InventorsBrian Kelly, Michael J. Kasper
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Abstract
In accordance with various aspects of the disclosure, a method and apparatus are disclosed that includes aspects of monitoring a first processor of a computer by a monitoring module for a first processor instability; determining if the first processor is stable based on the monitored first processor instability; routing operational priority to a second processor of the computer through a multiplexer module if the first processor is determined not to be stable, wherein a first interface of the first processor and a second interface of the second processor are in communication with the multiplexer module and wherein the first processor and the second processor are in communication by a processor interconnect; and operating the computer using the second processor.
Claims17
A method comprising:
- monitoring, by a monitoring module, a first processor of a computer for a first processor instability, wherein the first processor instability includes a pre-boot and a post-boot instability in the computer;
- determining if the first processor is stable based on the monitoring;
- multiplexing a communication from an interface to the first processor if the first processor is determined to be stable;
- and
- multiplexing the communication from the interface to a second processor of the computer if the first processor is determined not to be stable,
- wherein the first processor and the second processor are in communication by a processor interconnect.
An apparatus comprising:
- a first processor;
- a second processor communicatively connected to the first processor through an interconnect;
- a monitor configured to monitor a condition of the first processor and a condition of the second processor, wherein the monitor is configured to detect a pre-boot and a post-boot instability in the first processor or the second processor;
- and
- a multiplexer configured to route a communication from an interface to the first processor if the first processor is determined to be stable, and to route the communication from the interface to the second processor if the first processor is determined not to be stable.
Dependencies are inferred from the claim text.