Using addresses to detect overlapping memory regions
AssigneeApple Inc.
InventorJeffry E. Gonion
Life of this patent
Estimating the term…
Abstract
The described embodiments determine if two addressed memory regions overlap. First, a first address for a first memory region and a second address for a second memory region are received. Then a composite address is generated from the first and second addresses. Next, an upper subset and a lower subset of the bits in the addresses are determined. Then, using the upper and lower subsets of the addresses, a determination is made whether the addresses meet a condition from a set of conditions. If so, a determination is made whether the lower subset of the bits in the addresses meet a criteria from a set of criteria. Based on the determination whether the lower subset of the bits in the addresses meet a criteria, a determination is made whether the memory regions overlap or do not overlap.
Claims38
A method for determining if memory regions addressed using a first address and a second address overlap, comprising:
- receiving the first address for a first memory region and the second address for a second memory region, wherein each address comprises N bits and where the memory regions are of size S;
- generating a composite address, wherein the composite address is a result of an exclusive-OR (XOR) of the first address and the second address;
- determining an upper subset and a lower subset of the bits in the addresses based on the size S, wherein the addresses comprise the composite address, the first address, and the second address;
- and
- using the upper subset and the lower subset of the bits in the addresses to determine if the memory regions overlap.
A processor that determines if memory regions addressed using a first address and a second address overlap, comprising:
- a comparison mechanism, wherein the comparison mechanism is configured to:
- receive the first address for a first memory region and the second address for a second memory region, wherein each address comprises N bits and where the memory regions are of size S;
- generate a composite address, wherein the composite address is a result of an exclusive-OR (XOR) of the first address and the second address;
- determine an upper subset and a lower subset of the bits in the addresses based on the size S, wherein the addresses comprise the composite address, the first address, and the second address;
- and
- use the upper subset and the lower subset of the bits in the addresses to determine if the memory regions overlap.
A computer system that determines if a memory regions addressed using a first address and a second address overlap, comprising:
- a processor;
- a memory coupled to the processor, wherein the memory stores instructions and data for the processor;
- and
- a comparison mechanism in the processor, wherein the comparison mechanism is configured to:
- receive the first address for a first memory region and the second address for a second memory region, wherein each address comprises N bits and where the memory regions are of size S;
- generate a composite address, wherein the composite address is a result of an exclusive-OR (XOR) of the first address and the second address;
- determine an upper subset and a lower subset of the bits in the addresses based on the size S, wherein the addresses comprise the composite address, the first address, and the second address;
- and
- use the upper subset and the lower subset of the bits in the addresses to determine if the memory regions overlap.
Dependencies are inferred from the claim text.