Main board and method for dynamically configuring periperhal component interconnect express ports thereof

Abstract

A main board and a method for dynamically configuring PCIE ports thereof. The main board comprises a PCIE slot, a detecting circuit, an ROM, a chipset and a modifying circuit. The chipset comprises a Management Engine controller and several PCIE ports. The chipset has a Management Engine function or a similar function. The detecting circuit detects the PCIE slot to generate a current state parameter. The ROM stores a default configuration data. The modifying circuit coupled between the chipset and the ROM determines whether the default configuration data needs to be modified according to the current state parameter. When the default configuration data needs to be modified, the modifying circuit modifies the default configuration data according to the current state parameter, so that the Management Engine controller initially configures the PCIE ports according to the modified default configuration data. Thus, the dynamical configuration of the chipset PCIE ports is realized.

Dependencies are inferred from the claim text.