Method and apparatus for automated validation of semiconductor process recipes

An apparatus for validating a semiconductor process recipe, comprising:

• a memory configured to store recipe checker software and a plurality of rule sets describing operating windows for semiconductor process tools;
• and
• a processor, coupled to the memory, configured to execute the recipe checker software to:
• select a rule set describing from the plurality of rule sets for a semiconductor process tool;
• check parameter values defined by steps in the semiconductor process recipe against limit-checking rules of the rule set to produce first results;
• determine step types from the steps in the semiconductor process recipe using step definition rules of the rule set to produce second results;
• check transitions between the step types against step transition rules of the rule set to produce third results;
• and
• generate validation data for use of the semiconductor process recipe with the semiconductor process tool based on the first, the second, and the third results.

A non-transitory computer readable medium having instructions stored thereon that when executed by a processor cause the processor to perform a method of validating a semiconductor process recipe, comprising:

• selecting a rule set describing an operating window for a semiconductor process tool;
• checking parameter values defined by steps in the semiconductor process recipe against limit-checking rules of the rule set to produce first results;
• determining step types from the steps in the semiconductor process recipe using step definition rules of the rule set to produce second results;
• checking transitions between the step types against step transition rules of the rule set to produce third results;
• and
• generating, using the computer, validation data for use of the semiconductor process recipe with the semiconductor process tool based on the first, the second, and the third results.