Embedded graphics coding: reordered bitstream for parallel decoding
AssigneeSony Corporation
InventorsWei Liu, Mohammad Gharavi-Alkhansari
Life of this patent
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Abstract
Reordering of a bitstream is able to be used to speed up the decoding in embedded graphics coding. In the reordering, the signaling bits of all of the groups are sent and then the refinement bits of each group follow. With this reordering, the decoder can decode the header, identify the number of refinement bits for each group and locate the starting point of each group within the bitstream, therefore parallel processing of each group is able to be implemented at the decoder side.
Claims23
A method programmed in a controller in a device comprising:
- a. dividing an image into blocks and partitioning the blocks into groups;
- and
- b. encoding each of the groups, wherein encoding further comprises:
- i. generating signaling bits for groups of a bit-plane of an image block;
- ii. generating refinement bits for each of the groups;
- and
- iii. combining the signaling bits to form a header of a bitstream.
A method of decoding programmed in a controller in a device comprising:
- a. receiving an encoded bit-plane including signaling bits and refinement bits;
- b. determining a quantity of the refinement bits for each group within the bit-plane;
- and
- c. utilizing the number of the refinement bits to perform parallel decoding of the bit-plane.
An encoder device comprising:
- a. a memory for storing an application, the application for:
- i. dividing an image into blocks and partitioning the blocks into groups;
- and
- ii. encoding each of the groups, wherein encoding further comprises:
- (1) generating signaling bits for groups within a bit-plane;
- (2) generating refinement bits for each of the groups;
- and
- (3) combining the signaling bits to form a header of a bit-plane;
- and
- b. a processing component coupled to the memory, the processing component configured for processing the application.
A decoder device comprising:
- a. a memory for storing an application, the application for:
- i. receiving an encoded bit-plane including signaling bits and refinement bits;
- ii. determining a quantity of refinement bits for each group within the bit-plane ;
- and
- iii. utilizing the quantity of the refinement bits for each group to decode the groups within the bit-plane in parallel;
- and
- b. a processing component coupled to the memory, the processing component configured for processing the application.
A system programmed in a controller in a device comprising:
- a. a partitioning module for partitioning a block of an image into a plurality of groups;
- b. an encoding module for encoding the groups including generating a signaling bit and a set of refinement bits for each group, wherein a set of signaling bits is transmitted before the refinement bits;
- and
- c. a transmitting module for transmitting the encoded bitstream.
Dependencies are inferred from the claim text.