Computational generation of narrow-bandwidth digital signals
AssigneeFreescale Semiconductor, Inc.
InventorLaurent Gauthier
Life of this patent
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Abstract
A signal shaper generates an output signal representing a binary sequence, the output signal being the time-dependence of a signal value F. The signal shaper is input a first signal value F0 and a different second signal value F1, and receives a sequence of data bits. If the state of a first data bit and the state of a second data bit differ, the signal shaper controls the signal value F to change monotonically from the first signal value F0 or the second signal value F1 at a first point in time via one or more intermediate values at intermediate points in time to the second signal value F1 or the first signal value F0 at a later second point in time. On the time interval from the first point in time to the second point in time, the output signal may be a monotonic step function.
Claims20
A signal shaper for generating an output signal representing a binary sequence, the output signal being a time-dependence of a signal value F, comprising:
- the signal shaper is configured to
- receive a first signal value F0 and a different second signal value F1;
- receive a sequence of data bits, each data bit having a state which is either “zero” or “one”, the sequence containing at least a first data bit and a subsequent second data bit;
- determine the state of the first data bit and the state of the second data bit;
- if the state of the first data bit and the state of the second data bit are determined to be “zero” and “one”, respectively, controlling the signal value F to change monotonically from the first signal value F0 at a first point in time via one or more intermediate values at intermediate points in time to a second signal value F1 at a later second point in time;
- and,
- if the state of the first data bit and the state of the second data bit are determined to be “one” and “zero”, respectively, controlling the signal value F to change monotonically from the second signal value F1 at the first point in time via one or more intermediate values at intermediate points in time to the first signal value F0 at the second point in time, wherein the signal value F is an oscillation frequency delivered by a phase-locked loop;
- wherein the signal shaper is in an integrated circuit.
A signal shaper for generating an output signal representing a binary sequence, the output signal being a time-dependence of a signal value F, comprising:
- the signal shaper is configured to
- receive a first signal value F0 and a different second signal value F1;
- receive a sequence of data bits, each data bit having a state which is either “zero” or “one”, the sequence containing at least a first data bit and a subsequent second data bit;
- determine the state of the first data bit and the state of the second data bit;
- if the state of the first data bit and the state of the second data bit are determined to be “zero” and “one”, respectively, controlling the signal value F to change monotonically from the first signal value F0 at a first point in time via one or more intermediate values at intermediate points in time to a second signal value F1 at a later second point in time, wherein the intermediate points in time comprise 2N+1 equidistant points in time at which the signal value F assumes the following values:
- F0+ΔF/2k+1 where k=0, . . . , N;
- and
- F1−ΔF/2k+1 where k=1, . . . , N;
- N being an integer number equal to or greater than zero, and ΔF being the difference F1−F0;
- and,
- if the state of the first data bit and the state of the second data bit are determined to be “one” and “zero”, respectively, controlling the signal value F to change monotonically from the second signal value F1 at the first point in time via one or more intermediate values at intermediate points in time to the first signal value F0 at the second point in time;
- wherein the signal shaper is in an integrated circuit.
A method of generating an output signal representing a binary sequence, the output signal being a time-dependence of a signal value F, the method comprising:
- receiving a first signal value F0 and a different second signal value F1;
- receiving a sequence of data bits, each data bit having a state which is either “zero” or “one”, the sequence containing at least a first data bit and a subsequent second data bit;
- determining the state of the first data bit and the state of the second data bit;
- if it is determined that the state of the first data bit and the state of the second data bit are “zero” and “one”, respectively, controlling the signal value F to change monotonically from the first signal value F0 at a first point in time via one or more intermediate values at intermediate points in time to a second signal value F1 at a later second point in time;
- if it is determined that the state of the first data bit and the state of the second data bit are “one” and “zero”, respectively, controlling the signal value F to change monotonically from the second signal value F1 at the first point in time via one or more intermediate values at intermediate points in time to the first signal value F0 at the second point in time;
- and
- controlling an oscillation frequency delivered by a phase-locked loop as a function of the received sequence of data bits.
Dependencies are inferred from the claim text.