Arrangement and approach for time slot index synchronization for wireless communications

A synchronizing circuit arrangement for processing wireless signals via time slot index synchronization, the synchronizing circuit arrangement comprising:

• a receiver circuit to receive wireless signals from a remote wireless transmitter, the wireless signals including signal frames with a plurality of sequential time slots in each frame, and to process the wireless signals in accordance with a synchronization condition;
• a time slot index synchronizer circuit to
• detect a beacon at the front of a time slot in a signal frame and use the beacon to set the synchronization condition for the received signal frame,
• use data in symbols that follow the beacon in the time slot to fine tune the set synchronization condition,
• detect a time slot index synchronization failure as a function of a quality characteristic of a sub-channel of one of the received signal frames,
• in response to detecting a time slot index synchronization failure in a signal frame, controlling the receiver circuit to resynchronize the time slots;
• and
• the synchronizer circuit operates in a synchronization acquisition phase by detecting the time slot index,
• setting the time slot index as acquired in response to a time slot index of “0” and a check result of decoded data from the signal frame being correct, and entering a tracking phase, and
• setting the time slot index as not acquired and continuing to operate in an acquisition phase in response to a check result of decoded data from the signal frame being incorrect.