Data exchange device using orthogonal vectors
AssigneeST-Ericsson SA
InventorAbdelaziz Goulahsen
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Abstract
An integrated circuit and a method for transmitting messages from initiator units of an integrated circuit to at least one target unit of the integrated circuit. The initiator units transform first digital messages into second digital messages, the second messages being added, then transmitted to the target unit. The transformation of the first messages into second messages comprises the application of an orthogonal transformation by means of vectors obtained from rows or columns of an identity matrix.
Claims15
A method for transmitting messages from first units of an integrated circuit to at least one second unit of the integrated circuit, the method comprising:
- transforming first digital messages by the first units into second digital messages;
- adding the second messages of the units;
- and
- transmitting said added second messages to said at least one second unit, wherein
- the transformation of the first messages into second messages comprises applying an orthogonal transformation by means of vectors obtained from rows or columns of an identity matrix, and wherein
- a bit (bi) of a first message of rank i is transformed into an n-bit word (Mi) of a second message of rank i by the steps of:
- a) transforming said bit of the first message of rank i into an intermediary n-bit word (mi) by application of a vector obtained from a row or a column of an identity matrix of rank n;
- and
- b) obtaining the n-bit word of the second message of rank i by replacing the bit of rank i of said intermediary word with value “0”.
An integrated circuit comprising:
- an interconnection unit;
- and
- first units and at least one second unit connected to the interconnection unit, wherein
- the first units are configured to provide second digital messages by a coding comprising the application of an orthogonal transformation to first messages, the orthogonal transformation being performed by means of vectors obtained from rows or columns of an identity matrix, and wherein
- the interconnection unit comprises at least one adder configured to add the second messages of the first units and to transmit said added second messages to said at least one second unit;
- and wherein the integrated circuit further comprises:
- means for transforming a bit of a first message of rank i into an n-bit word of a second message of rank i, wherein
- a) said bit of the first message of rank i is transformed into an intermediary n-bit word by application of a vector obtained from a row or a column of an identity matrix of rank n;
- and
- b) the bit of rank i of said intermediary word is replaced with value “0” to obtain the n-bit word of the second message of rank i.
Dependencies are inferred from the claim text.