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US 8,526,255 B1Granted
Method and apparatus for memory test
AssigneeMarvell Israel (M.I.S.L) Ltd.
InventorsYosef Solt, Ofir Keren
Life of this patent
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Abstract
Aspects of the disclosure provide an integrated circuit. The integrated circuit includes a scrambler configured to provide a driving address and associated data to an envelope based on a memory configuration for using a memory array. The driving address and the associated data are used to test the memory array according to a test pattern. The envelope is configured to translate the driving address into a corresponding physical address of the memory array based on the memory configuration.
Claims20
An integrated circuit, comprising:
- a first scrambler configured to provide a first driving address and associated first data to a first envelope based on a first memory configuration for using a first memory array, the first driving address and the associated first data being used to test the first memory array according to a first test pattern, wherein the first envelope is configured to translate the first driving address into a corresponding physical address of the first memory array based on the first memory configuration.
A method for memory testing, comprising:
- receiving by a first scrambler a test address and associated test data for testing a first memory array;
- translating the test address and the associated test data into a first driving address and first data based on a first memory configuration for using the first memory array;
- and
- providing the first driving address and the first data to a first envelope that envelops the first memory array, the first envelope translating the first driving address into a first physical address based on the first memory configuration, and the first data being written to the first physical address of the first memory array.
1 more element
A method for memory testing, comprising:
- receiving by a first scrambler an address scramble mode and a data scramble mode for testing a first memory array;
- generating a first driving address based on the address scramble mode and a first memory configuration for using the first memory array;
- generating first data based on the data scramble mode and the first memory configuration;
- and
- providing the first driving address and the first data to a first envelope that envelops the first memory array, the first envelope translating the first driving address into a first physical address based on the first memory configuration, and the first data being written to the first physical address of the first memory array.
2 more elements
Dependencies are inferred from the claim text.