Programming methods for a memory device

A method for programming a memory cell of a memory device, the method comprising:

• storing target data into latches associated with the memory cell wherein the target data is data representative of a target count value corresponding to a minimum programmed threshold voltage;
• performing a first iteration of a programming operation, wherein the programming operation comprises:
• setting a minimum and a maximum voltage value in a register associated with a circuit configured to generate a ramped voltage from the minimum to the maximum voltage values set in the register;
• biasing a control gate of the memory cell with a programming pulse;
• and
• performing a program verify operation on the memory cell where the program verify operation comprises:
• incrementing a counter having a minimum and a maximum counter value while applying the ramped voltage to the control gate wherein the minimum counter value corresponds to the minimum voltage of the applied ramped voltage and the maximum counter value corresponds to the maximum voltage of the applied ramped voltage;
• and
• latching the counter value responsive to activating the memory cell and comparing the latched counter value to the target count value;
• and
• performing a second iteration of the programming operation subsequent to performing the first iteration of the programming operation wherein the minimum and maximum voltage values set in the register during the second iteration are different than respective minimum and maximum voltage values set in the register during the first iteration.

A method for programming a memory cell of a memory device, the method comprising:

• storing target data into latches associated with the memory cell wherein the target data is data representative of a target count value corresponding to a minimum programmed threshold voltage;
• performing one or more first iterations of a programming operation, wherein the programming operation comprises:
• setting a minimum and a maximum voltage value in a register associated with a circuit configured to generate a ramped voltage from the minimum to the maximum voltage values set in the register;
• biasing a control gate of the memory cell with a programming pulse;
• and
• performing a program verify operation on the memory cell where the program verify operation comprises:
• incrementing a counter having a minimum and a maximum counter value while applying the ramped voltage to the control gate wherein the minimum counter value corresponds to the minimum voltage of the applied ramped voltage and the maximum counter value corresponds to the maximum voltage of the applied ramped voltage;
• and
• latching the counter value responsive to activating the memory cell and comparing the latched counter value to the target count value;
• repeating the one or more first iterations of the programming operation until the latched counter value equals or exceeds the target count value;
• and
• performing one or more second iterations of the programming operation subsequent to performing the one or more first iterations of the programming operation wherein at least one of the minimum or maximum voltage values set in the register during the one or more second iterations is different than a respective one of the minimum and/or maximum voltage values set in the register during the one or more first iterations.