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US 8,526,214 B2Granted
Resistor thin film MTP memory
AssigneeStmicroelectronics Pte Ltd
InventorOlivier Le Neel
Life of this patent
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Abstract
An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has two adjustable resistors and two heating elements. A dielectric material separates the heating elements from the adjustable resistors. One heating element alters the resistance of one of the resistors by applying heat thereto to write data to the memory cell. The other heating element alters the resistance of the other resistor by applying heat thereto to erase data from the memory cell.
Claims13
A method comprising:
- writing data to a memory cell having a first and a second thin film adjustable resistor, the writing including:
- passing a first current through a first thin film heating element;
- and
- altering a resistance of the first thin film adjustable resistor;
- erasing data from the memory cell, including:
- passing a second current through a second thin film heating element;
- and
- altering a resistance of the second thin film adjustable resistor.
5 more elements
A method comprising:
- altering a resistance of a first thin film resistor within a memory cell to write data to the memory cell;
- and
- altering a resistance of a second thin film resistor within the memory cell to erase data from the memory cell.
Dependencies are inferred from the claim text.