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US 8,525,598 B2Granted
Digital to analog converter for phase locked loop
AssigneeFreescale Semiconductor, Inc.
InventorPravesh Kumar Saini
Life of this patent
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Abstract
A digital to analog converter (DAC) that reduces sub-threshold leakage current in PLLs includes three series connected transistors, a unity gain buffer, and a switch. The system is connected between the voltage-to-current converter and a current-controlled oscillator. The DAC receives and accurately mirrors a current signal generated by a voltage-to-current converter.
Claims19
A digital to analog converter (DAC) for mirroring current, comprising:
- a first transistor having a gate terminal that receives a control signal, and source and substrate terminals connected to a voltage source, wherein the first transistor generates a first intermediate signal;
- a second transistor having a source terminal connected to a drain terminal of the first transistor for receiving the first intermediate signal, a substrate terminal connected to the voltage source, and a gate terminal that receives a switching signal, wherein the second transistor generates a second intermediate signal;
- a third transistor having a source terminal connected to a drain terminal of the second transistor for receiving the second intermediate signal, a substrate terminal connected to the voltage source, and a gate terminal that receives the switching signal, wherein the third transistor generates a third intermediate signal;
- a unity gain buffer, connected to the third transistor, for generating a fourth intermediate signal;
- and
- a switch, connected to an output terminal of the unity gain buffer, and drain and source terminals of the second and the third transistors, respectively, for transmitting the fourth intermediate signal to the source terminal of the third transistor.
3 more elements
A voltage-controlled oscillator (VCO) for generating an oscillator signal, comprising:
- a voltage-to-current converter for generating a control signal based on a control voltage;
- a digital-to-analog converter (DAC), connected to the voltage-to-current converter, for mirroring the control signal, wherein the DAC comprises:
- a first transistor having a gate terminal connected to the voltage-to-current converter, for receiving the control signal, and source and substrate terminals connected to a voltage source, wherein the first transistor generates a first intermediate signal;
- a second transistor having a source terminal connected to a drain terminal of the first transistor for receiving the first intermediate signal, a substrate terminal connected to the voltage source, and a gate terminal for receiving a switching signal, wherein the second transistor generates a second intermediate signal;
- a third transistor having a source terminal connected to a drain terminal of the second transistor for receiving the second intermediate signal, a substrate terminal connected to the voltage source, and a gate terminal for receiving the switching signal, wherein the third transistor generates a third intermediate signal;
- a unity gain buffer, connected to the third transistor, for generating a fourth intermediate signal;
- and
- a switch, connected to an output terminal of the unity gain buffer, and drain and source terminals of the second and the third transistors, respectively, for transmitting the fourth intermediate signal to the source terminal of the third transistor based on the switching signal and an inverted value of the switching signal;
- and
- a current-controlled oscillator (CCO), connected to the DAC, for receiving the third intermediate signal and generating the oscillator signal.
7 more elements
A phase-locked loop (PLL) system for outputting an oscillator signal, comprising:
- a phase-frequency detector (PFD) for receiving an input reference clock signal and generating an analog error signal based on the input reference clock signal and a feedback clock signal;
- a charge pump, connected to the PFD, for generating a drive current based on the analog error signal;
- a filter, connected to the charge pump, for generating a control voltage based on the drive current;
- a voltage-controlled oscillator (VCO) for generating the oscillator signal, comprising:
- a voltage-to-current converter, connected to the analog filter, for generating a control signal based on the control voltage;
- a digital-to-analog converter (DAC), connected to the voltage-to-current converter, for mirroring the control signal, the DAC comprising:
- a first transistor having a gate terminal connected to the voltage-to-current converter for receiving the control signal, and source and substrate terminals connected to a voltage source, wherein the first transistor generates a first intermediate signal;
- a second transistor having a source terminal connected to a drain terminal of the first transistor for receiving the first intermediate signal, a substrate terminal connected to the voltage source, and a gate terminal for receiving a switching signal, wherein the second transistor generates a second intermediate signal;
- a third transistor having a source terminal connected to a drain terminal of the second transistor for receiving the second intermediate signal, a substrate terminal connected to the voltage source, and a gate terminal for receiving the switching signal, wherein the third transistor generates a third intermediate signal;
- a unity gain buffer, connected to the third transistor for receiving the third intermediate signal and generating a fourth intermediate signal;
- and
- a switch, connected to an output terminal of the unity gain buffer, and drain and source terminals of the second and the third transistors, respectively, for transmitting the fourth intermediate signal to the source terminal of the third transistor based on an inverted switching signal and the switching signal;
- a current-controlled oscillator (CCO), connected to the DAC, for receiving the third intermediate signal and generating the oscillator signal;
- and
- a frequency divider, connected to the CCO, for generating the feedback clock signal by adjusting the frequency of the oscillator signal.
12 more elements
Dependencies are inferred from the claim text.