Reference buffer amplifier
AssigneeCrest Semiconductors, Inc.
InventorsTracy Johancsik, Rex K. Hales, Ryan James Kier, Yusuf Haque
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Abstract
A reference buffer amplifier within an integrated circuit includes a first output terminal connected to a first bond pad, the first bond pad being connected to a first external pin of the integrated circuit chip, the first external pin to allow an external capacitance to be connected to the output terminal. The reference buffer further includes a variable, settable resistance sub-circuit connected to a second bond pad, the second bond pad also being connected to the first external pin. The resistance sub-circuit is configured to be set to exhibit a resistance value to critically dampen a response of the reference buffer amplifier.
Claims21
A reference buffer within an integrated circuit comprising:
- a first output terminal of an amplifier connected to a first bond pad, said first bond pad being connected to a first external pin of said integrated circuit chip, said first external pin to allow an external capacitance to be connected to said output terminal;
- and
- a variable, settable resistance sub-circuit connected in series between an internal load and a second bond pad, said second bond pad also being connected to said first external pin;
- wherein, said resistance sub-circuit is configured to be set to exhibit a resistance value that will cause said amplifier to more closely approach a critically damped response.
A method for operating a reference buffer amplifier, the method comprising:
- applying a voltage to a reference buffer amplifier, an output of said reference buffer amplifier being connected to a first bond pad, said first bond pad being connected to an external pin, said external pin configured to have an external capacitance connected thereto;
- determining a resistance value that when said resistance value is connected to a second bond pad, said second bond pad also being connected to said external pin, said reference buffer exhibits an improved settling response for said reference buffer output at an internal load;
- and
- setting a variable, settable resistance sub-circuit connected in series between said internal load and said second bond pad to said resistance value,
- said resistance sub-circuit being configured to take on a discrete range of resistance values.
A differential reference buffer amplifier comprising:
- a first output terminal connected to a first bond pad, said first bond pad being connected to a first external pin of said integrated circuit chip, said first external pin to allow an external capacitance to be connected to said output terminal;
- and
- a first variable, settable resistance sub-circuit connected in series between an internal load and a second bond pad, said second bond pad also being connected to said first external pin;
- a second output terminal connected to a third bond pad, said third bond pad connected to a second external pin, said second external pin to allow said external capacitance to exist between said first external pin and said second external pin;
- and
- a second variable settable resistance sub-circuit connected in series between an internal load and a fourth bond pad, said fourth bond pad also being connected to said second external pin;
- wherein, said resistance sub-circuits are configured to be set to exhibit a resistance value that will improve a settling response of said reference buffer output at said internal load.
Dependencies are inferred from the claim text.