Semiconductor circuit and constant voltage regulator employing same
AssigneeRicoh Company, Ltd.
InventorsKoichi Morino, Yuki Kashima, Masatoshi Ito, Shimpei Sakai
Life of this patent
Estimating the term…
Abstract
A semiconductor circuit includes a voltage regulator and a buffer transistor. The voltage regulator converts an input voltage input to an input terminal thereof into an output voltage output to an output terminal thereof. The buffer transistor is an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator.
Claims15
A semiconductor circuit for use in connection with a power supply terminal, the circuit comprising:
- a voltage regulator to convert an input voltage input to an input terminal thereof into an output voltage output to an output terminal thereof;
- and
- a buffer transistor, being an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator, a voltage at the gate terminal being higher than a voltage at the source terminal.
A voltage regulator for use in connection with a power supply terminal, the voltage regulator comprising:
- an input terminal to receive an input voltage supplied from the power supply terminal;
- an output terminal to output an output voltage to load circuitry;
- a driver transistor connected between the input and output terminals to convert the input voltage into the output voltage;
- and
- a buffer transistor, being an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator, a voltage at the gate terminal being higher than a voltage at the source terminal.
Dependencies are inferred from the claim text.