Method and device for evaluating electric performances of an FDSOI transistor
AssigneeCommissariat A L'energie Atomique Et Aux Energies Alternatives
InventorsXavier Garros, Laurent Brunet
Life of this patent
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Abstract
A method for evaluating the electric performances of an FDSOI transistor, including the steps of: measuring capacitance and/or conductance of the FDSOI transistor, by applying a voltage VBG>0 on a substrate composed of semiconductor of the FDSOI transistor when the FDSOI transistor is NMOS or a voltage VBG<0 on the substrate composed of semiconductor of the FDSOI transistor when the FDSOI transistor is PMOS, depending on a voltage VFG applied between a gate and source and drain regions of the FDSOI transistor.
Claims11
A method for evaluating the electric performances of an FDSOI transistor, including the steps of:
- measuring capacitance and/or conductance of the FDSOI transistor, by applying a voltage VBG>0 on a substrate composed of semiconductor of the FDSOI transistor when the FDSOI transistor is NMOS or a voltage VBG<0 on the substrate composed of semiconductor of the FDSOI transistor when the FDSOI transistor is PMOS, depending on a voltage VFG applied between a gate and source and drain regions of the FDSOI transistor,
- calculating theoretical values of capacitance and/or conductance of a transistor modeled by an electric circuit equivalent to the FDSOI transistor, depending on values of the voltages VFG and VBG applied to the modeled transistor and for different selected theoretical values of defect densities Dit1, Dit2 at an interface between a gate dielectric of the modeled transistor and a semiconductor intended to form the channel of the modeled transistor and an interface between the semiconductor intended to form the channel of the modeled transistor and a buried dielectric of the modeled transistor respectively, and
- determining real values of the defect densities Dit1, Dit2 at the corresponding interfaces of the FDSOI transistor by a comparison between the measured values of the capacitance and/or of the conductance of the FDSOI transistor and the calculated theoretical values of the capacitance and/or of the conductance of the modeled transistor for the different selected theoretical values of the defect densities Dit1, Dit2 at the interfaces of the modeled transistor.
A device for evaluating the electric performances of an FDSOI transistor, said device comprising:
- an impedance analyzer that measures capacitance and/or conductance of the FDSOI transistor, by applying a voltage VBG>0 on a substrate composed of semiconductor of the FDSOI transistor when the FDSOI transistor is NMOS or a voltage VBG<0 on the substrate composed of semiconductor of the FDSOI transistor when the FDSOI transistor is PMOS, depending on a voltage VFG applied between a gate and source and drain regions of the FDSOI transistor, and
- a computer that calculates theoretical values of the capacitance and/or the conductance of a transistor modeled by an electric circuit equivalent to the FDSOI transistor, depending on values of the voltages VFG and VBG applied to the modeled transistor and for different selected theoretical values of defect densities Dit1, Dit2 at an interface between a gate dielectric of the modeled transistor and a semiconductor intended to form the channel of the modeled transistor and an interface between the semiconductor intended to form the channel of the modeled transistor and a buried dielectric of the modeled transistor respectively,
- wherein the computer determines real values of the defect densities Dit1, Dit2 at the corresponding interfaces of the FDSOI transistor by a comparison between the measured values of the capacitance and/or of the conductance of the FDSOI transistor and the calculated theoretical values of the capacitance and/or of the conductance of the modeled transistor for the different selected theoretical values of the defect densities Dit1, Dit2 at the interfaces of the modeled transistor.
Dependencies are inferred from the claim text.