Method and apparatus to increase efficiency in a power factor correction circuit

Abstract

A power factor correction (PFC) controller includes a first integrator coupled to integrate an input current of a PFC converter. A first signal is generated in response to the first integrator to end an on time of a power switch of the PFC converter. A second integrator is coupled to integrate a difference between a constant voltage and an input voltage of the PFC converter. A second signal is generated in response to the second integrator to end an off time of the power switch of the PFC converter. A driver circuit is coupled to vary the switching frequency of the power switch of the PFC converter in response to the first and the second signals and to output a third signal to switch the power switch of the PFC converter to control the input current to be substantially proportional to the input voltage.

Dependencies are inferred from the claim text.