Method and apparatus for improving gate contact

A method of fabricating a semiconductor device, the method comprising:

• providing a substrate having an upwardly facing first surface, having first and second regions, and having first and second trenches extending downwardly into the substrate from the first surface, wherein the first and second trenches are located in the first and second regions, respectively;
• forming first and second isolation structures disposed partly in the first and second trenches, respectively, and having respective upwardly facing second and third surfaces higher than the first surface, the isolation structures each having portions respectively disposed above and below the first surface, wherein the second and third surfaces are vertically higher than the first surface by a first step height;
• removing a top portion of the first isolation structure to form a recess therein having an upwardly facing bottom surface disposed below the first surface, wherein the bottom surface and the first surface are spaced vertically by a second step height smaller than the first step height;
• depositing a first dielectric layer having a first thickness over the first and second regions;
• removing the first dielectric layer over the second region and removing a portion of the second isolation structure above the first surface such that the first surface and the third surface are approximately coplanar;
• depositing a second dielectric layer having a second thickness smaller than the first thickness over the second region and the second isolation region;
• forming first and second gate structures on the first and second dielectric layers, respectively, the first gate structure being over the first region and the recess, and the second gate structure being over the second region and the second isolation structure;
• and
• forming first and second gate contacts, the first gate contact engaging the first gate structure over the recess, and the second gate contact engaging the second gate structure.