Method of fabricating semiconductor device with vertical channel transistor

A method of forming a semiconductor memory device, the method comprising:

• forming a first trench and a second trench having substantially a same configuration in a semiconductor substrate, the first and second trenches disposed next to each other and extending in a first direction;
• forming a first gate pattern in the first trench and a second gate pattern in the second trench;
• forming a third gate pattern on the first gate pattern and in the first trench;
• forming a third trench across the first trench in a second direction that is substantially perpendicular to the first direction;
• forming a bit line in the third trench;
• forming a fourth gate pattern on the second gate pattern;
• forming a plug insulation pattern on the fourth gate pattern and in the second trench;
• and
• forming a word line on the third gate pattern.