Silicon wafer and method for producing the same
AssigneeSiltronic AG
InventorsKatsuhiko Nakai, Masamichi Ohkubo
Life of this patent
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Abstract
Silicon wafers doped with nitrogen, hydrogen and carbon, have a plurality of voids, wherein 50% or more of the total number of voids are bubble-like shaped aggregates of voids; a V1 region having a void density of over 2×104/cm3 and below 1×105/cm3 which occupies 20% or less of the total area of the silicon wafer; a V2 region having a void density of 5×102 to 2×104/cm3 which occupies 80% or more of the total area of said silicon wafer; and a bulk micro defect density which is 5×108/cm3 or more, have excellent GOI characteristics and a high C-mode pass rate. The wafers are cut from a single crystal pulled by a method in which carbon, nitrogen, and hydrogen dopants are controlled, and the crystal is subjected to rapid cooling.
Claims3
A method for producing a silicon single crystal wafer comprising
- a plurality of voids, wherein 50% or more of the total number of voids are bubble-like shaped aggregates of voids;
- a V1 region having a void density of over 2×104/cm3 and below 1×105/cm3 which occupies less than or equal to 20% of the total area of the silicon wafer;
- a V2 region having a void density of 5×102 to 2×104/cm3 which occupies 80% or more of the total area of the silicon wafer;
- and
- a bulk micro defect density which is 5×108/cm3 or more, and wherein the silicon single crystal wafer is doped with nitrogen, hydrogen and carbon;
- the method comprising:
- pulling a silicon single crystal in a pulling furnace with a crystal pulling speed and doping the silicon single crystal with nitrogen, carbon and hydrogen;
- controlling the nitrogen concentration in the silicon crystal to 3×1013 to 3×1015 atoms/cm2;
- controlling carbon concentration in the silicon crystal to 1×1015 to 9×1015 atoms/cm3;
- controlling a partial pressure of hydrogen in the crystal pulling furnace to 3 to 60 Pa;
- controlling a temperature gradient in a longitudinal direction of the silicon single crystal within a temperature range of 1100 to 1200° C. to 3.5° C./mm or more;
- controlling the crystal pulling speed to less than or equal to an upper limit value and greater than or equal to a lower limit value;
- and
- cutting a silicon wafer from the silicon single crystal,
- wherein the silicon wafer comprises a V1 region having a void density of over 2×104/cm3 and below 1×105/cm3 which occupies 20% of the total area of said silicon wafer if the single crystal was pulled with the upper limit value of the crystal pulling speed, and comprises a V2 region having a void density of 5×102 to 2×104/cm3 which occupies 80% of the total area of said silicon wafer if the single crystal was pulled with the lower limit value of the crystal pulling speed.
A silicon single crystal wafer comprising
- a plurality of voids, wherein 50% or more of the total number of voids are bubble-like shaped aggregates of voids;
- a V1 region having a void density of over 2×104/cm3 and below 1×105/cm3 which occupies less than or equal to 20% of the total area of the silicon wafer;
- a V2 region having a void density of 5×102 to 2×104/cm3 which occupies 80% or more of the total area of the silicon wafer;
- and
- a bulk micro defect density which is 5×108/cm3 or more, and wherein the silicon single crystal wafer is doped with nitrogen, hydrogen and carbon.
Dependencies are inferred from the claim text.